derek.holloway
7502bf64a4
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52 lines
1.4 KiB
LLVM
52 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -O3 -mtriple=aarch64-arm < %s | FileCheck %s
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; Run at O3 to make sure we can optimize load/store instructions after Machine
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; Block Placement takes place using Tail Duplication Threshold = 4.
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define void @foo(i1 %cond, ptr %ptr) {
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; CHECK-LABEL: foo:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: tbz w0, #0, .LBB0_2
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; CHECK-NEXT: // %bb.1: // %if.then
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; CHECK-NEXT: ldp x9, x8, [x1, #8]
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; CHECK-NEXT: str xzr, [x1, #16]
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; CHECK-NEXT: cmp x8, x9
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; CHECK-NEXT: b.lt .LBB0_3
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; CHECK-NEXT: b .LBB0_4
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; CHECK-NEXT: .LBB0_2: // %if.else
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; CHECK-NEXT: ldp x8, x9, [x1]
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; CHECK-NEXT: cmp x8, x9
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; CHECK-NEXT: b.ge .LBB0_4
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; CHECK-NEXT: .LBB0_3: // %exit1
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; CHECK-NEXT: str xzr, [x1, #8]
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; CHECK-NEXT: .LBB0_4: // %common.ret
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; CHECK-NEXT: ret
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entry:
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br i1 %cond, label %if.then, label %if.else
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if.then:
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%0 = getelementptr inbounds i64, ptr %ptr, i64 2
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%1 = load i64, ptr %0, align 8
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store i64 0, ptr %0, align 8
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br label %if.end
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if.else:
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%2 = load i64, ptr %ptr, align 8
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br label %if.end
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if.end:
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%3 = phi i64 [ %1, %if.then ], [ %2, %if.else ]
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%4 = getelementptr inbounds i64, ptr %ptr, i64 1
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%5 = load i64, ptr %4, align 8
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%6 = icmp slt i64 %3, %5
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br i1 %6, label %exit1, label %exit2
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exit1:
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store i64 0, ptr %4, align 8
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ret void
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exit2:
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ret void
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}
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