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63 lines
2.6 KiB
LLVM
63 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc -mtriple aarch64 -mattr=+sve < %s | FileCheck %s
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define <vscale x 4 x i16> @sdiv_nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %y, <vscale x 4 x i1> %m) {
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; CHECK-LABEL: sdiv_nxv4i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p1.s
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; CHECK-NEXT: sxth z1.s, p1/m, z1.s
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; CHECK-NEXT: sxth z0.s, p1/m, z0.s
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; CHECK-NEXT: sdiv z0.s, p0/m, z0.s, z1.s
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; CHECK-NEXT: ret
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%res = call <vscale x 4 x i16> @llvm.masked.sdiv(<vscale x 4 x i16> %x, <vscale x 4 x i16> %y, <vscale x 4 x i1> %m)
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ret <vscale x 4 x i16> %res
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}
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define <vscale x 4 x i32> @sdiv_nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %y, <vscale x 4 x i1> %m) {
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; CHECK-LABEL: sdiv_nxv4i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sdiv z0.s, p0/m, z0.s, z1.s
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; CHECK-NEXT: ret
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%res = call <vscale x 4 x i32> @llvm.masked.sdiv(<vscale x 4 x i32> %x, <vscale x 4 x i32> %y, <vscale x 4 x i1> %m)
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ret <vscale x 4 x i32> %res
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}
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define <vscale x 8 x i32> @sdiv_nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %y, <vscale x 8 x i1> %m) {
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; CHECK-LABEL: sdiv_nxv8i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: punpklo p1.h, p0.b
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; CHECK-NEXT: punpkhi p0.h, p0.b
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; CHECK-NEXT: sdiv z0.s, p1/m, z0.s, z2.s
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; CHECK-NEXT: sdiv z1.s, p0/m, z1.s, z3.s
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; CHECK-NEXT: ret
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%res = call <vscale x 8 x i32> @llvm.masked.sdiv(<vscale x 8 x i32> %x, <vscale x 8 x i32> %y, <vscale x 8 x i1> %m)
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ret <vscale x 8 x i32> %res
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}
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define <vscale x 8 x i16> @sdiv_nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %y, <vscale x 8 x i1> %m) {
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; CHECK-LABEL: sdiv_nxv8i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z2.h, #1 // =0x1
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; CHECK-NEXT: sel z1.h, p0, z1.h, z2.h
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; CHECK-NEXT: sunpkhi z2.s, z0.h
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; CHECK-NEXT: sunpklo z0.s, z0.h
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: sunpkhi z3.s, z1.h
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; CHECK-NEXT: sunpklo z1.s, z1.h
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; CHECK-NEXT: sdiv z2.s, p0/m, z2.s, z3.s
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; CHECK-NEXT: sdiv z0.s, p0/m, z0.s, z1.s
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; CHECK-NEXT: uzp1 z0.h, z0.h, z2.h
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; CHECK-NEXT: ret
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%res = call <vscale x 8 x i16> @llvm.masked.sdiv(<vscale x 8 x i16> %x, <vscale x 8 x i16> %y, <vscale x 8 x i1> %m)
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ret <vscale x 8 x i16> %res
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}
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define <vscale x 2 x i64> @sdiv_nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y, <vscale x 2 x i1> %m) {
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; CHECK-LABEL: sdiv_nxv2i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sdiv z0.d, p0/m, z0.d, z1.d
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; CHECK-NEXT: ret
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%res = call <vscale x 2 x i64> @llvm.masked.sdiv(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y, <vscale x 2 x i1> %m)
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ret <vscale x 2 x i64> %res
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}
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