derek.holloway
7502bf64a4
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23 lines
1.1 KiB
LLVM
23 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=aarch64 -mattr=+sve | FileCheck %s
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define <vscale x 4 x i8> @widget(i1 %arg, <vscale x 4 x i1> %arg1, <vscale x 4 x i8> %arg2, <vscale x 4 x i8> %arg3) {
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; CHECK-LABEL: widget:
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; CHECK: // %bb.0: // %bb
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; CHECK-NEXT: mvn w8, w0
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; CHECK-NEXT: sbfx x8, x8, #0, #1
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; CHECK-NEXT: whilelo p1.s, xzr, x8
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; CHECK-NEXT: mov z1.s, p1/z, #1 // =0x1
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; CHECK-NEXT: orr z0.d, z1.d, z0.d
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; CHECK-NEXT: mov z0.s, p0/m, z1.s
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; CHECK-NEXT: ret
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bb:
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%insertelement = insertelement <vscale x 4 x i1> zeroinitializer, i1 %arg, i64 0
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%shufflevector = shufflevector <vscale x 4 x i1> %insertelement, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i32> zeroinitializer
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%xor = xor <vscale x 4 x i1> %shufflevector, splat (i1 true)
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%zext = zext <vscale x 4 x i1> %xor to <vscale x 4 x i8>
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%select = select <vscale x 4 x i1> %arg1, <vscale x 4 x i8> zeroinitializer, <vscale x 4 x i8> %arg2
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%or = or <vscale x 4 x i8> %select, %zext
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ret <vscale x 4 x i8> %or
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}
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