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84 lines
3.0 KiB
YAML
84 lines
3.0 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -verify-coalescing -run-pass=register-coalescer -o - %s | FileCheck %s
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# The copy from %0 to %1 introduces liveness for %3.sub2. After
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# coalescing, the use of %1.sub2 needs to be marked undef. The
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# subregless copy previously did not consider the existing subregister
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# on the use operand.
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---
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name: undef_subreg_use_after_full_copy_coalesce_0
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: undef_subreg_use_after_full_copy_coalesce_0
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; CHECK: undef [[V_MOV_B32_e32_:%[0-9]+]].sub0:vreg_96 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: dead [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_96 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: S_ENDPGM 0, implicit undef [[V_MOV_B32_e32_]].sub2
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undef %0.sub0:vreg_96 = V_MOV_B32_e32 0, implicit $exec
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%0.sub1:vreg_96 = V_MOV_B32_e32 0, implicit $exec
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%1:vreg_96 = COPY killed %0
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S_ENDPGM 0, implicit %1.sub2
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...
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# Same, except coalesced copy has a subregister index that needs to be
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# composed with the use index.
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---
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name: undef_subreg_use_after_full_copy_coalesce_composed
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: undef_subreg_use_after_full_copy_coalesce_composed
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; CHECK: undef [[V_MOV_B32_e32_:%[0-9]+]].sub0:vreg_128 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: dead [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_128 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF
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; CHECK-NEXT: S_ENDPGM 0, implicit [[DEF]].sub1
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undef %0.sub0:vreg_128 = V_MOV_B32_e32 0, implicit $exec
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%0.sub1:vreg_128 = V_MOV_B32_e32 0, implicit $exec
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%1:vreg_128 = COPY killed %0
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%2:vreg_64 = COPY killed %1.sub2_sub3
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S_ENDPGM 0, implicit %2.sub1
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...
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# FIXME: Initial computed range is wrong for %0.sub2_sub3 and fails
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# verifier.
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# ---
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# name: undef_subreg_use_after_full_copy_coalesce_composed2
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# tracksRegLiveness: true
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# body: |
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# bb.0:
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# undef %0.sub0:vreg_128 = V_MOV_B32_e32 0, implicit $exec
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# %0.sub1:vreg_128 = V_MOV_B32_e32 0, implicit $exec
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# %1:vreg_128 = COPY killed %0.sub2_sub3
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# S_ENDPGM 0, implicit %1.sub1
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# ...
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---
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name: undef_subreg_use_after_full_copy_coalesce_1
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; CHECK-LABEL: name: undef_subreg_use_after_full_copy_coalesce_1
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_96 = COPY $vgpr0
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; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_96 = COPY $vgpr1
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; CHECK-NEXT: S_NOP 0, implicit undef [[COPY]].sub2
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; CHECK-NEXT: S_NOP 0, implicit [[COPY]].sub1
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; CHECK-NEXT: S_ENDPGM 0
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%0:vgpr_32 = COPY killed $vgpr0
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%1:vgpr_32 = COPY killed $vgpr1
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undef %2.sub0:vreg_96 = COPY killed %0
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%2.sub1:vreg_96 = COPY killed %1
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%3:vreg_96 = COPY killed %2
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S_NOP 0, implicit %3.sub2
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S_NOP 0, implicit %3.sub1
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S_ENDPGM 0
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...
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