derek.holloway
7502bf64a4
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512 lines
25 KiB
YAML
512 lines
25 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=prologepilog -o - %s | FileCheck %s
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---
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name: save_inactive_lanes_non_csr_vgpr
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alignment: 1
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tracksRegLiveness: true
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noPhis: true
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isSSA: false
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noVRegs: true
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hasFakeUses: false
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tracksDebugUserValues: true
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frameInfo:
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maxAlignment: 1
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isCalleeSavedInfoValid: true
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machineFunctionInfo:
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maxKernArgAlign: 1
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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returnsVoid: false
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occupancy: 16
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sgprForEXECCopy: '$sgpr105'
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isWholeWaveFunction: true
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body: |
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bb.0:
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; CHECK-LABEL: name: save_inactive_lanes_non_csr_vgpr
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; CHECK: liveins: $vgpr0, $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
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; CHECK-NEXT: $sgpr0 = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
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; CHECK-NEXT: $exec_lo = S_MOV_B32 -1
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; CHECK-NEXT: $vgpr0 = V_MOV_B32_e32 14, implicit $exec
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; CHECK-NEXT: $exec_lo = S_XOR_B32 $sgpr0, -1, implicit-def $scc
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; CHECK-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $vgpr0(tied-def 0) :: ("amdgpu-thread-private" load (s32) from %stack.0, addrspace 5)
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; CHECK-NEXT: $exec_lo = S_MOV_B32 $sgpr0
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; CHECK-NEXT: SI_RETURN implicit killed $vgpr0
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renamable $sgpr0 = SI_WHOLE_WAVE_FUNC_SETUP implicit-def dead $exec, implicit $exec
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$vgpr0 = V_MOV_B32_e32 14, implicit $exec
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SI_WHOLE_WAVE_FUNC_RETURN killed renamable $sgpr0, implicit killed $vgpr0
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...
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---
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name: save_all_lanes_csr_vgpr
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alignment: 1
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tracksRegLiveness: true
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noPhis: true
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isSSA: false
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noVRegs: true
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hasFakeUses: false
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tracksDebugUserValues: true
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frameInfo:
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maxAlignment: 1
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isCalleeSavedInfoValid: true
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machineFunctionInfo:
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maxKernArgAlign: 1
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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returnsVoid: false
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occupancy: 16
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sgprForEXECCopy: '$sgpr105'
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isWholeWaveFunction: true
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body: |
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bb.0:
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; CHECK-LABEL: name: save_all_lanes_csr_vgpr
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; CHECK: liveins: $vgpr40
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
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; CHECK-NEXT: $sgpr0 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr40, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr40, 0
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; CHECK-NEXT: $vgpr40 = V_MOV_B32_e32 14, implicit $exec
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; CHECK-NEXT: $vgpr40 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.0, addrspace 5)
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; CHECK-NEXT: $exec_lo = S_MOV_B32 $sgpr0
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; CHECK-NEXT: SI_RETURN
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renamable $sgpr0 = SI_WHOLE_WAVE_FUNC_SETUP implicit-def dead $exec, implicit $exec
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$vgpr40 = V_MOV_B32_e32 14, implicit $exec
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SI_WHOLE_WAVE_FUNC_RETURN killed renamable $sgpr0
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...
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---
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name: save_csr_sgpr_to_non_csr_vgpr
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alignment: 1
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tracksRegLiveness: true
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noPhis: true
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isSSA: false
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noVRegs: true
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hasFakeUses: false
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tracksDebugUserValues: true
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frameInfo:
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maxAlignment: 1
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isCalleeSavedInfoValid: true
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machineFunctionInfo:
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maxKernArgAlign: 1
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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returnsVoid: false
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occupancy: 16
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sgprForEXECCopy: '$sgpr105'
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isWholeWaveFunction: true
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body: |
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bb.0:
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liveins: $sgpr20, $vgpr191
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; CHECK-LABEL: name: save_csr_sgpr_to_non_csr_vgpr
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; CHECK: liveins: $sgpr20, $vgpr191, $vgpr192
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr192
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
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; CHECK-NEXT: $vcc_lo = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr192, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr192, 0
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; CHECK-NEXT: $exec_lo = S_MOV_B32 -1
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; CHECK-NEXT: $vgpr192 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr192
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; CHECK-NEXT: $sgpr20 = S_MOV_B32 14, implicit $exec
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; CHECK-NEXT: $sgpr20 = SI_RESTORE_S32_FROM_VGPR $vgpr192, 0
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; CHECK-NEXT: $exec_lo = S_XOR_B32 $vcc_lo, -1, implicit-def $scc
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; CHECK-NEXT: $vgpr192 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.0, addrspace 5)
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; CHECK-NEXT: $exec_lo = S_MOV_B32 $vcc_lo
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; CHECK-NEXT: SI_RETURN
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$vgpr192 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr192
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renamable $vcc_lo = SI_WHOLE_WAVE_FUNC_SETUP implicit-def dead $exec, implicit $exec
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$sgpr20 = S_MOV_B32 14, implicit $exec
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$sgpr20 = SI_RESTORE_S32_FROM_VGPR $vgpr192, 0
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SI_WHOLE_WAVE_FUNC_RETURN killed renamable $vcc_lo
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...
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---
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name: save_csr_sgpr_to_csr_vgpr
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alignment: 1
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tracksRegLiveness: true
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noPhis: true
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isSSA: false
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noVRegs: true
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hasFakeUses: false
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tracksDebugUserValues: true
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frameInfo:
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maxAlignment: 1
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isCalleeSavedInfoValid: true
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machineFunctionInfo:
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maxKernArgAlign: 1
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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returnsVoid: false
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occupancy: 16
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sgprForEXECCopy: '$sgpr105'
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isWholeWaveFunction: true
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body: |
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bb.0:
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liveins: $sgpr20, $vgpr191
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; CHECK-LABEL: name: save_csr_sgpr_to_csr_vgpr
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; CHECK: liveins: $sgpr20, $vgpr191
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
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; CHECK-NEXT: $vcc_lo = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr191, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr191, 0
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; CHECK-NEXT: $vgpr191 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr191
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; CHECK-NEXT: $sgpr20 = S_MOV_B32 14, implicit $exec
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; CHECK-NEXT: $sgpr20 = SI_RESTORE_S32_FROM_VGPR $vgpr191, 0
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; CHECK-NEXT: $vgpr191 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.0, addrspace 5)
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; CHECK-NEXT: $exec_lo = S_MOV_B32 $vcc_lo
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; CHECK-NEXT: SI_RETURN
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$vgpr191 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr191
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renamable $vcc_lo = SI_WHOLE_WAVE_FUNC_SETUP implicit-def dead $exec, implicit $exec
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$sgpr20 = S_MOV_B32 14, implicit $exec
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$sgpr20 = SI_RESTORE_S32_FROM_VGPR $vgpr191, 0
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SI_WHOLE_WAVE_FUNC_RETURN killed renamable $vcc_lo
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...
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---
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name: vgpr_and_sgpr_csr
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alignment: 1
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tracksRegLiveness: true
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noPhis: true
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isSSA: false
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noVRegs: true
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hasFakeUses: false
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tracksDebugUserValues: true
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liveins:
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- { reg: '$vgpr0' }
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- { reg: '$vgpr1' }
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frameInfo:
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maxAlignment: 4
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isCalleeSavedInfoValid: true
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machineFunctionInfo:
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maxKernArgAlign: 1
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hasSpilledSGPRs: true
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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returnsVoid: false
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occupancy: 16
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spillPhysVGPRs:
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- '$vgpr191'
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wwmReservedRegs:
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- '$vgpr191'
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isWholeWaveFunction: true
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body: |
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bb.0:
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liveins: $sgpr20, $vgpr0, $vgpr1, $vgpr191
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; CHECK-LABEL: name: vgpr_and_sgpr_csr
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; CHECK: liveins: $sgpr20, $vgpr0, $vgpr1, $vgpr40, $vgpr49, $vgpr49
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
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; CHECK-NEXT: $vcc_lo = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
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; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr49, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.2, addrspace 5)
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr49, 256
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; CHECK-NEXT: $exec_lo = S_MOV_B32 -1
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; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr40, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.1, addrspace 5)
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr40, 128
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; CHECK-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr0
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; CHECK-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $sgpr20
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; CHECK-NEXT: S_NOP 0, implicit-def $vgpr49, implicit-def $sgpr40
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; CHECK-NEXT: $sgpr20 = SI_RESTORE_S32_FROM_VGPR $vgpr0, 0
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; CHECK-NEXT: $vgpr40 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.1, addrspace 5)
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; CHECK-NEXT: $exec_lo = S_XOR_B32 $vcc_lo, -1, implicit-def $scc
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; CHECK-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.0, addrspace 5)
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; CHECK-NEXT: $vgpr49 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 8, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.2, addrspace 5)
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; CHECK-NEXT: $exec_lo = S_MOV_B32 $vcc_lo
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; CHECK-NEXT: SI_RETURN
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$vgpr191 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr191
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renamable $vcc_lo = SI_WHOLE_WAVE_FUNC_SETUP implicit-def dead $exec, implicit $exec
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S_NOP 0, implicit-def $vgpr40, implicit-def $sgpr20
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S_NOP 0, implicit-def $vgpr49, implicit-def $sgpr40
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$sgpr20 = SI_RESTORE_S32_FROM_VGPR $vgpr191, 0
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SI_WHOLE_WAVE_FUNC_RETURN killed renamable $vcc_lo
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...
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---
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name: split_orig_exec
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alignment: 1
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tracksRegLiveness: true
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noPhis: true
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isSSA: false
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noVRegs: true
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hasFakeUses: false
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tracksDebugUserValues: true
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liveins:
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- { reg: '$vgpr0' }
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- { reg: '$vgpr1' }
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frameInfo:
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maxAlignment: 4
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isCalleeSavedInfoValid: true
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machineFunctionInfo:
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maxKernArgAlign: 1
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hasSpilledSGPRs: true
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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returnsVoid: false
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occupancy: 16
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spillPhysVGPRs:
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- '$vgpr191'
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wwmReservedRegs:
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- '$vgpr191'
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isWholeWaveFunction: true
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body: |
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bb.0:
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liveins: $sgpr20, $vgpr0, $vgpr1, $vgpr191
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; CHECK-LABEL: name: split_orig_exec
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; CHECK: liveins: $sgpr20, $vgpr0, $vgpr1, $vgpr40, $vgpr49, $vgpr49
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
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; CHECK-NEXT: $vcc_lo = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
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; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr49, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.2, addrspace 5)
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr49, 256
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; CHECK-NEXT: $exec_lo = S_MOV_B32 -1
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; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr40, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.1, addrspace 5)
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr40, 128
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; CHECK-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr0
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; CHECK-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $sgpr20
|
|
; CHECK-NEXT: $sgpr3 = COPY $vcc_lo
|
|
; CHECK-NEXT: S_NOP 0, implicit-def $vgpr49, implicit-def $sgpr40
|
|
; CHECK-NEXT: $sgpr20 = SI_RESTORE_S32_FROM_VGPR $vgpr0, 0
|
|
; CHECK-NEXT: $vgpr40 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.1, addrspace 5)
|
|
; CHECK-NEXT: $exec_lo = S_XOR_B32 $sgpr3, -1, implicit-def $scc
|
|
; CHECK-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.0, addrspace 5)
|
|
; CHECK-NEXT: $vgpr49 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 8, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.2, addrspace 5)
|
|
; CHECK-NEXT: $exec_lo = S_MOV_B32 $sgpr3
|
|
; CHECK-NEXT: SI_RETURN
|
|
$vgpr191 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr191
|
|
renamable $vcc_lo = SI_WHOLE_WAVE_FUNC_SETUP implicit-def dead $exec, implicit $exec
|
|
S_NOP 0, implicit-def $vgpr40, implicit-def $sgpr20
|
|
$sgpr3 = COPY $vcc_lo
|
|
S_NOP 0, implicit-def $vgpr49, implicit-def $sgpr40
|
|
$sgpr20 = SI_RESTORE_S32_FROM_VGPR $vgpr191, 0
|
|
SI_WHOLE_WAVE_FUNC_RETURN killed renamable $sgpr3
|
|
|
|
...
|
|
---
|
|
name: vgpr_superregs
|
|
alignment: 1
|
|
tracksRegLiveness: true
|
|
noPhis: true
|
|
isSSA: false
|
|
noVRegs: true
|
|
hasFakeUses: false
|
|
tracksDebugUserValues: true
|
|
frameInfo:
|
|
maxAlignment: 1
|
|
isCalleeSavedInfoValid: true
|
|
machineFunctionInfo:
|
|
maxKernArgAlign: 1
|
|
frameOffsetReg: '$sgpr33'
|
|
stackPtrOffsetReg: '$sgpr32'
|
|
returnsVoid: false
|
|
occupancy: 16
|
|
sgprForEXECCopy: '$sgpr105'
|
|
isWholeWaveFunction: true
|
|
body: |
|
|
bb.0:
|
|
; CHECK-LABEL: name: vgpr_superregs
|
|
; CHECK: liveins: $vgpr0, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr40, $vgpr41, $vgpr42, $vgpr0, $vgpr2, $vgpr3, $vgpr4, $vgpr5
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
|
|
; CHECK-NEXT: $sgpr0 = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
|
|
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
|
|
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr2, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.1, addrspace 5)
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 128
|
|
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr3, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.2, addrspace 5)
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr3, 256
|
|
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr4, $sgpr32, 12, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.3, addrspace 5)
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr4, 384
|
|
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr5, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.4, addrspace 5)
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr5, 512
|
|
; CHECK-NEXT: $exec_lo = S_MOV_B32 -1
|
|
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr40, $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.5, addrspace 5)
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr40, 640
|
|
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr41, $sgpr32, 24, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.6, addrspace 5)
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr41, 768
|
|
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr42, $sgpr32, 28, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.7, addrspace 5)
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr42, 896
|
|
; CHECK-NEXT: $vgpr0 = V_MOV_B32_e32 14, implicit $exec
|
|
; CHECK-NEXT: S_NOP 0, implicit-def $vgpr2_vgpr3_vgpr4_vgpr5, implicit-def $vgpr40_vgpr41_vgpr42
|
|
; CHECK-NEXT: $vgpr40 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.5, addrspace 5)
|
|
; CHECK-NEXT: $vgpr41 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 24, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.6, addrspace 5)
|
|
; CHECK-NEXT: $vgpr42 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 28, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.7, addrspace 5)
|
|
; CHECK-NEXT: $exec_lo = S_XOR_B32 $sgpr0, -1, implicit-def $scc
|
|
; CHECK-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $vgpr0(tied-def 0) :: ("amdgpu-thread-private" load (s32) from %stack.0, addrspace 5)
|
|
; CHECK-NEXT: $vgpr2 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.1, addrspace 5)
|
|
; CHECK-NEXT: $vgpr3 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 8, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.2, addrspace 5)
|
|
; CHECK-NEXT: $vgpr4 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 12, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.3, addrspace 5)
|
|
; CHECK-NEXT: $vgpr5 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.4, addrspace 5)
|
|
; CHECK-NEXT: $exec_lo = S_MOV_B32 $sgpr0
|
|
; CHECK-NEXT: SI_RETURN implicit killed $vgpr0
|
|
renamable $sgpr0 = SI_WHOLE_WAVE_FUNC_SETUP implicit-def dead $exec, implicit $exec
|
|
$vgpr0 = V_MOV_B32_e32 14, implicit $exec
|
|
S_NOP 0, implicit-def $vgpr2_vgpr3_vgpr4_vgpr5, implicit-def $vgpr40_vgpr41_vgpr42
|
|
SI_WHOLE_WAVE_FUNC_RETURN killed renamable $sgpr0, implicit killed $vgpr0
|
|
|
|
...
|
|
---
|
|
name: dont_restore_used_vgprs
|
|
alignment: 1
|
|
tracksRegLiveness: true
|
|
noPhis: true
|
|
isSSA: false
|
|
noVRegs: true
|
|
hasFakeUses: false
|
|
tracksDebugUserValues: true
|
|
liveins:
|
|
- { reg: '$vgpr0' }
|
|
- { reg: '$vgpr20' }
|
|
- { reg: '$vgpr40' }
|
|
frameInfo:
|
|
maxAlignment: 1
|
|
isCalleeSavedInfoValid: true
|
|
machineFunctionInfo:
|
|
maxKernArgAlign: 1
|
|
frameOffsetReg: '$sgpr33'
|
|
stackPtrOffsetReg: '$sgpr32'
|
|
returnsVoid: false
|
|
occupancy: 16
|
|
sgprForEXECCopy: '$sgpr105'
|
|
isWholeWaveFunction: true
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr20, $vgpr40
|
|
|
|
; CHECK-LABEL: name: dont_restore_used_vgprs
|
|
; CHECK: liveins: $vgpr0, $vgpr20, $vgpr40
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
|
|
; CHECK-NEXT: $sgpr0 = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
|
|
; CHECK-NEXT: S_NOP 0, implicit $vgpr0, implicit $vgpr20, implicit $vgpr40
|
|
; CHECK-NEXT: $exec_lo = S_MOV_B32 $sgpr0
|
|
; CHECK-NEXT: SI_RETURN implicit killed $vgpr0
|
|
renamable $sgpr0 = SI_WHOLE_WAVE_FUNC_SETUP implicit-def dead $exec, implicit $exec
|
|
S_NOP 0, implicit $vgpr0, implicit $vgpr20, implicit $vgpr40
|
|
SI_WHOLE_WAVE_FUNC_RETURN killed renamable $sgpr0, implicit killed $vgpr0
|
|
|
|
...
|
|
---
|
|
name: multiple_blocks
|
|
alignment: 1
|
|
tracksRegLiveness: true
|
|
noPhis: true
|
|
isSSA: false
|
|
noVRegs: true
|
|
hasFakeUses: false
|
|
tracksDebugUserValues: true
|
|
liveins:
|
|
- { reg: '$vgpr0' }
|
|
- { reg: '$vgpr1' }
|
|
frameInfo:
|
|
maxAlignment: 1
|
|
isCalleeSavedInfoValid: true
|
|
machineFunctionInfo:
|
|
maxKernArgAlign: 1
|
|
frameOffsetReg: '$sgpr33'
|
|
stackPtrOffsetReg: '$sgpr32'
|
|
returnsVoid: false
|
|
occupancy: 16
|
|
sgprForEXECCopy: '$sgpr105'
|
|
isWholeWaveFunction: true
|
|
body: |
|
|
; CHECK-LABEL: name: multiple_blocks
|
|
; CHECK: bb.0:
|
|
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
|
; CHECK-NEXT: liveins: $vgpr0, $vgpr1, $vgpr0, $vgpr1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
|
|
; CHECK-NEXT: $vcc_lo = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
|
|
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
|
|
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr1, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" store (s32) into %stack.1, addrspace 5)
|
|
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr1, 128
|
|
; CHECK-NEXT: $exec_lo = S_MOV_B32 -1
|
|
; CHECK-NEXT: $sgpr1 = S_MOV_B32 $exec_lo
|
|
; CHECK-NEXT: V_CMPX_EQ_U32_nosdst_e64 $vgpr0, $vgpr1, implicit-def $exec, implicit $exec
|
|
; CHECK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
|
|
; CHECK-NEXT: S_BRANCH %bb.1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.1:
|
|
; CHECK-NEXT: successors: %bb.2(0x80000000)
|
|
; CHECK-NEXT: liveins: $vcc_lo, $sgpr1, $vgpr0, $vgpr1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: renamable $vgpr1 = V_ADD_U32_e64 $vgpr0, $vgpr1, 0, implicit $exec
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: bb.2:
|
|
; CHECK-NEXT: liveins: $vcc_lo, $sgpr1, $vgpr0, $vgpr1
|
|
; CHECK-NEXT: {{ $}}
|
|
; CHECK-NEXT: $exec_lo = S_OR_B32 $exec_lo, killed renamable $sgpr1, implicit-def $scc
|
|
; CHECK-NEXT: renamable $vgpr0 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr0, $vcc_lo, implicit $exec
|
|
; CHECK-NEXT: $exec_lo = S_XOR_B32 $vcc_lo, -1, implicit-def $scc
|
|
; CHECK-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $vgpr0(tied-def 0) :: ("amdgpu-thread-private" load (s32) from %stack.0, addrspace 5)
|
|
; CHECK-NEXT: $vgpr1 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: ("amdgpu-thread-private" load (s32) from %stack.1, addrspace 5)
|
|
; CHECK-NEXT: $exec_lo = S_MOV_B32 $vcc_lo
|
|
; CHECK-NEXT: SI_RETURN implicit $vgpr0
|
|
bb.0:
|
|
successors: %bb.1, %bb.2
|
|
liveins: $vgpr0, $vgpr1
|
|
|
|
renamable $vcc_lo = SI_WHOLE_WAVE_FUNC_SETUP implicit-def dead $exec, implicit $exec
|
|
$sgpr1 = S_MOV_B32 $exec_lo
|
|
V_CMPX_EQ_U32_nosdst_e64 $vgpr0, $vgpr1, implicit-def $exec, implicit $exec
|
|
S_CBRANCH_EXECZ %bb.2, implicit $exec
|
|
S_BRANCH %bb.1
|
|
|
|
bb.1:
|
|
liveins: $vcc_lo, $sgpr1, $vgpr0, $vgpr1
|
|
|
|
renamable $vgpr1 = V_ADD_U32_e64 $vgpr0, $vgpr1, 0, implicit $exec
|
|
|
|
bb.2:
|
|
liveins: $vcc_lo, $sgpr1, $vgpr0, $vgpr1
|
|
|
|
$exec_lo = S_OR_B32 $exec_lo, killed renamable $sgpr1, implicit-def $scc
|
|
renamable $vgpr0 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr0, $vcc_lo, implicit $exec
|
|
SI_WHOLE_WAVE_FUNC_RETURN killed renamable $vcc_lo, implicit $vgpr0
|
|
|
|
...
|