derek.holloway
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76 lines
2.5 KiB
LLVM
76 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=hexagon -hexagon-hvx-widen=32 -hexagon-fp-fast-convert=true -mattr=+hvxv68,+hvx-length128b,+hvx-qfloat < %s | FileCheck %s --check-prefix=CHECK-V68
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; RUN: llc -mtriple=hexagon -hexagon-hvx-widen=32 -hexagon-fp-fast-convert=true -mattr=+hvxv81,+hvx-length128b,+hvx-qfloat < %s | FileCheck %s --check-prefix=CHECK-V81
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; ----------------------------
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; V68 Tests
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; ----------------------------
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; f16 -> s16 (No widening)
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define void @f16s16_0(ptr %a0, ptr %a1) #0 {
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; CHECK-V68-LABEL: f16s16_0:
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; CHECK-V68: {
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; CHECK-V68: [[DST:v[0-9]+]].h = [[SRC:v[0-9]+]].hf
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; CHECK-V68-NEXT: jumpr r31
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; CHECK-V68: vmem(r1+#0) = [[DST]].new
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; CHECK-V68-NEXT: }
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%v0 = load <64 x half>, ptr %a0, align 128
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%v1 = fptosi <64 x half> %v0 to <64 x i16>
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store <64 x i16> %v1, ptr %a1, align 128
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ret void
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}
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; f32 -> s8 (Triggers V6_vconv_w_sf)
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define void @f32s8_2(ptr %a0, ptr %a1) {
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; CHECK-V68-LABEL: f32s8_2:
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; CHECK-V68: {
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; CHECK-V68: [[SRC:v[0-9]+]] = vmem(r0+#0)
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; CHECK-V68: [[SRC]].w = [[SRC]].sf
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; CHECK-V68: vpack
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; CHECK-V68: vpack
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; CHECK-V68: vpack
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; CHECK-V68: jumpr r31
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; CHECK-V68: vmem(r1+#0) = [[DST:v[0-9]+]]
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; CHECK-V68-NEXT: }
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%v0 = load <32 x float>, ptr %a0, align 128
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%v1 = fptosi <32 x float> %v0 to <32 x i8>
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store <32 x i8> %v1, ptr %a1, align 128
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ret void
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}
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; ----------------------------
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; V81 Tests
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; ----------------------------
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; f16 -> s16 with rounding (V6_vconv_h_hf_rnd)
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define void @f16s16_v81(ptr %a0, ptr %a1) {
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; CHECK-V81-LABEL: f16s16_v81:
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; CHECK-V81: {
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; CHECK-V81: [[DST:v[0-9]+]].h = [[SRC:v[0-9]+]].hf:rnd
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; CHECK-V81-NEXT: jumpr r31
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; CHECK-V81: vmem(r1+#0) = [[DST]].new
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; CHECK-V81-NEXT: }
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%v0 = load <64 x half>, ptr %a0, align 128
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%v1 = fptosi <64 x half> %v0 to <64 x i16>
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store <64 x i16> %v1, ptr %a1, align 128
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ret void
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}
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; f32 -> s8 with V81 (still uses V6_vconv_w_sf)
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define void @f32s8_v81(ptr %a0, ptr %a1) {
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; CHECK-V81-LABEL: f32s8_v81:
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; CHECK-V81: {
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; CHECK-V81: [[SRC:v[0-9]+]] = vmem(r0+#0)
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; CHECK-V81: [[SRC]].w = [[SRC]].sf
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; CHECK-V81: vpack
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; CHECK-V81: vpack
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; CHECK-V81: vpack
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; CHECK-V81: jumpr r31
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; CHECK-V81: vmem(r1+#0) = [[DST:v[0-9]+]]
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; CHECK-V81-NEXT: }
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%v0 = load <32 x float>, ptr %a0, align 128
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%v1 = fptosi <32 x float> %v0 to <32 x i8>
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store <32 x i8> %v1, ptr %a1, align 128
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ret void
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}
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