derek.holloway
7502bf64a4
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30 lines
1.0 KiB
LLVM
30 lines
1.0 KiB
LLVM
; RUN: opt -march=hexagon -hexagon-loop-idiom -S < %s | FileCheck %s
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; RUN: opt -mtriple=hexagon-- -p hexagon-loop-idiom -disable-memcpy-idiom -S < %s | FileCheck %s
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; Make sure we don't convert load/store loops into memcpy if the access type
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; is a vector. Using vector instructions is generally better in such cases.
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; CHECK-NOT: @llvm.memcpy
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%s.0 = type { i32 }
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define void @f0(ptr noalias %a0, ptr noalias %a1) #0 align 2 {
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b0:
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br i1 undef, label %b1, label %b2
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b1: ; preds = %b1, %b0
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%v0 = phi i32 [ %v7, %b1 ], [ 0, %b0 ]
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%v1 = mul nuw nsw i32 %v0, 64
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%v2 = getelementptr %s.0, ptr %a0, i32 %v1
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%v3 = getelementptr %s.0, ptr %a1, i32 %v1
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%v5 = load <64 x i32>, ptr %v2, align 256
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store <64 x i32> %v5, ptr %v3, align 256
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%v7 = add nuw nsw i32 %v0, 1
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br i1 undef, label %b1, label %b2
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b2: ; preds = %b1, %b0
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ret void
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}
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attributes #0 = { "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }
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