derek.holloway
7502bf64a4
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203 lines
6.4 KiB
YAML
203 lines
6.4 KiB
YAML
# RUN: llc -march=hexagon -mcpu=hexagonv68 -mattr=+hvxv68,+hvx-length128b \
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# RUN: -run-pass hexagon-qfp-optimizer -disable-qfp-opt-mul=false %s -o - | FileCheck %s --check-prefix=MUL-ENABLED
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# RUN: llc -march=hexagon -mcpu=hexagonv68 -mattr=+hvxv68,+hvx-length128b \
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# RUN: -run-pass hexagon-qfp-optimizer %s -o - | FileCheck %s --check-prefix=DEFAULT
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# MUL-ENABLED-LABEL: name: qfpAdd32
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# MUL-ENABLED: V6_vconv_sf_qf32
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# MUL-ENABLED-NEXT: V6_vadd_qf32_mix
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# MUL-ENABLED-NEXT: V6_vconv_sf_qf32
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# MUL-ENABLED-NEXT: V6_vS32Ub_ai
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# MUL-ENABLED-NEXT: V6_vadd_qf32
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# DEFAULT-LABEL: name: qfpAdd32
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# DEFAULT: V6_vconv_sf_qf32
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# DEFAULT-NEXT: V6_vadd_qf32_mix
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# DEFAULT-NEXT: V6_vconv_sf_qf32
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# DEFAULT-NEXT: V6_vS32Ub_ai
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# DEFAULT-NEXT: V6_vadd_qf32
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---
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name: qfpAdd32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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%0:intregs = COPY $r0
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%1:intregs = COPY $r1
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%2:intregs = COPY $r2
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%3:intregs = COPY $r3
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%4:hvxvr = V6_vL32Ub_ai %0:intregs, 0
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%5:hvxvr = V6_vL32Ub_ai %1:intregs, 0
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%6:hvxvr = V6_vadd_sf %4:hvxvr, %5:hvxvr
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%7:hvxvr = V6_vconv_sf_qf32 %6:hvxvr
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%8:hvxvr = V6_vadd_sf %5:hvxvr, %7:hvxvr
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%9:hvxvr = V6_vconv_sf_qf32 %8:hvxvr
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V6_vS32Ub_ai %2:intregs, 0, %9:hvxvr
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%10:hvxvr = V6_vadd_sf %7:hvxvr, %9:hvxvr
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%11:hvxvr = V6_vconv_sf_qf32 %10:hvxvr
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V6_vS32Ub_ai %3:intregs, 0, %11:hvxvr
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...
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# MUL-ENABLED-LABEL: name: qfpAdd16
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# MUL-ENABLED: V6_vconv_hf_qf16
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# MUL-ENABLED-NEXT: V6_vadd_qf16_mix
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# MUL-ENABLED-NEXT: V6_vconv_hf_qf16
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# MUL-ENABLED-NEXT: V6_vS32Ub_ai
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# MUL-ENABLED-NEXT: V6_vadd_qf16
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# DEFAULT-LABEL: name: qfpAdd16
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# DEFAULT: V6_vconv_hf_qf16
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# DEFAULT-NEXT: V6_vadd_qf16_mix
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# DEFAULT-NEXT: V6_vconv_hf_qf16
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# DEFAULT-NEXT: V6_vS32Ub_ai
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# DEFAULT-NEXT: V6_vadd_qf16
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---
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name: qfpAdd16
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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%0:intregs = COPY $r0
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%1:intregs = COPY $r1
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%2:intregs = COPY $r2
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%3:intregs = COPY $r3
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%4:hvxvr = V6_vL32Ub_ai %0:intregs, 0
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%5:hvxvr = V6_vL32Ub_ai %1:intregs, 0
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%6:hvxvr = V6_vadd_hf %4:hvxvr, %5:hvxvr
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%7:hvxvr = V6_vconv_hf_qf16 %6:hvxvr
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%8:hvxvr = V6_vadd_hf %5:hvxvr, %7:hvxvr
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%9:hvxvr = V6_vconv_hf_qf16 %8:hvxvr
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V6_vS32Ub_ai %2:intregs, 0, %9:hvxvr
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%10:hvxvr = V6_vadd_hf %7:hvxvr, %9:hvxvr
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%11:hvxvr = V6_vconv_hf_qf16 %10:hvxvr
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V6_vS32Ub_ai %3:intregs, 0, %11:hvxvr
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...
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# MUL-ENABLED-LABEL: name: qfpSub32
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# MUL-ENABLED: V6_vconv_sf_qf32
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# MUL-ENABLED-NEXT: V6_vsub_qf32_mix
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# MUL-ENABLED-NEXT: V6_vconv_sf_qf32
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# MUL-ENABLED-NEXT: V6_vS32Ub_ai
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# MUL-ENABLED-NEXT: V6_vsub_qf32
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# DEFAULT-LABEL: name: qfpSub32
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# DEFAULT: V6_vconv_sf_qf32
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# DEFAULT-NEXT: V6_vsub_qf32_mix
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# DEFAULT-NEXT: V6_vconv_sf_qf32
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# DEFAULT-NEXT: V6_vS32Ub_ai
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# DEFAULT-NEXT: V6_vsub_qf32
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---
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name: qfpSub32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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%0:intregs = COPY $r0
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%1:intregs = COPY $r1
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%2:intregs = COPY $r2
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%3:intregs = COPY $r3
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%4:hvxvr = V6_vL32Ub_ai %0:intregs, 0
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%5:hvxvr = V6_vL32Ub_ai %1:intregs, 0
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%6:hvxvr = V6_vsub_sf %4:hvxvr, %5:hvxvr
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%7:hvxvr = V6_vconv_sf_qf32 %6:hvxvr
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%8:hvxvr = V6_vsub_sf %7:hvxvr, %5:hvxvr
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%9:hvxvr = V6_vconv_sf_qf32 %8:hvxvr
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V6_vS32Ub_ai %2:intregs, 0, %9:hvxvr
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%10:hvxvr = V6_vsub_sf %7:hvxvr, %9:hvxvr
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%11:hvxvr = V6_vconv_sf_qf32 %10:hvxvr
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V6_vS32Ub_ai %3:intregs, 0, %11:hvxvr
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...
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# MUL-ENABLED-LABEL: name: qfpSub16
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# MUL-ENABLED: V6_vconv_hf_qf16
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# MUL-ENABLED-NEXT: V6_vsub_qf16_mix
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# MUL-ENABLED-NEXT: V6_vconv_hf_qf16
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# MUL-ENABLED-NEXT: V6_vS32Ub_ai
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# MUL-ENABLED-NEXT: V6_vsub_qf16
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# DEFAULT-LABEL: name: qfpSub16
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# DEFAULT: V6_vconv_hf_qf16
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# DEFAULT-NEXT: V6_vsub_qf16_mix
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# DEFAULT-NEXT: V6_vconv_hf_qf16
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# DEFAULT-NEXT: V6_vS32Ub_ai
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# DEFAULT-NEXT: V6_vsub_qf16
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---
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name: qfpSub16
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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%0:intregs = COPY $r0
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%1:intregs = COPY $r1
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%2:intregs = COPY $r2
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%3:intregs = COPY $r3
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%4:hvxvr = V6_vL32Ub_ai %0:intregs, 0
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%5:hvxvr = V6_vL32Ub_ai %1:intregs, 0
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%6:hvxvr = V6_vsub_hf %4:hvxvr, %5:hvxvr
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%7:hvxvr = V6_vconv_hf_qf16 %6:hvxvr
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%8:hvxvr = V6_vsub_hf %7:hvxvr, %5:hvxvr
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%9:hvxvr = V6_vconv_hf_qf16 %8:hvxvr
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V6_vS32Ub_ai %2:intregs, 0, %9:hvxvr
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%10:hvxvr = V6_vsub_hf %7:hvxvr, %9:hvxvr
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%11:hvxvr = V6_vconv_hf_qf16 %10:hvxvr
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V6_vS32Ub_ai %3:intregs, 0, %11:hvxvr
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...
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# MUL-ENABLED-LABEL: name: qfpMul32
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# MUL-ENABLED: V6_vmpy_qf32_sf
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# MUL-ENABLED-NEXT: V6_vconv_sf_qf32
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# MUL-ENABLED-NEXT: V6_vmpy_qf32_sf
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# MUL-ENABLED-NEXT: V6_vconv_sf_qf32
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# MUL-ENABLED-NEXT: V6_vmpy_qf32
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# MUL-ENABLED-NEXT: V6_vS32Ub_ai
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# DEFAULT-LABEL: name: qfpMul32
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# DEFAULT: V6_vmpy_qf32_sf
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# DEFAULT-NEXT: V6_vconv_sf_qf32
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# DEFAULT-NEXT: V6_vmpy_qf32_sf
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# DEFAULT-NEXT: V6_vconv_sf_qf32
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# DEFAULT-NEXT: V6_vmpy_qf32_sf
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# DEFAULT-NEXT: V6_vS32Ub_ai
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---
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name: qfpMul32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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%0:intregs = COPY $r0
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%1:intregs = COPY $r1
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%2:intregs = COPY $r2
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%3:intregs = COPY $r3
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%4:hvxvr = V6_vL32Ub_ai %0:intregs, 0
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%5:hvxvr = V6_vL32Ub_ai %1:intregs, 0
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%6:hvxvr = V6_vL32Ub_ai %2:intregs, 0
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%7:hvxvr = V6_vmpy_qf32_sf %4:hvxvr, %5:hvxvr
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%8:hvxvr = V6_vconv_sf_qf32 %7:hvxvr
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%9:hvxvr = V6_vmpy_qf32_sf %5:hvxvr, %6:hvxvr
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%10:hvxvr = V6_vconv_sf_qf32 %9:hvxvr
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%11:hvxvr = V6_vmpy_qf32_sf %8:hvxvr, %10:hvxvr
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V6_vS32Ub_ai %3:intregs, 0, %11:hvxvr
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...
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# MUL-ENABLED-LABEL: name: qfpMul16
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# MUL-ENABLED: V6_vconv_hf_qf16
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# MUL-ENABLED-NEXT: V6_vmpy_qf16_mix_hf
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# MUL-ENABLED-NEXT: V6_vconv_hf_qf16
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# MUL-ENABLED-NEXT: V6_vS32Ub_ai
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# MUL-ENABLED-NEXT: V6_vmpy_qf16
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# DEFAULT-LABEL: name: qfpMul16
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# DEFAULT: V6_vconv_hf_qf16
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# DEFAULT-NEXT: V6_vmpy_qf16_hf
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# DEFAULT-NEXT: V6_vconv_hf_qf16
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# DEFAULT-NEXT: V6_vS32Ub_ai
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# DEFAULT-NEXT: V6_vmpy_qf16_hf
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---
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name: qfpMul16
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $r0, $r1, $r2, $r3
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%0:intregs = COPY $r0
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%1:intregs = COPY $r1
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%2:intregs = COPY $r2
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%3:intregs = COPY $r3
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%4:hvxvr = V6_vL32Ub_ai %0:intregs, 0
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%5:hvxvr = V6_vL32Ub_ai %1:intregs, 0
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%6:hvxvr = V6_vmpy_qf16_hf %4:hvxvr, %5:hvxvr
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%7:hvxvr = V6_vconv_hf_qf16 %6:hvxvr
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%8:hvxvr = V6_vmpy_qf16_hf %5:hvxvr, %7:hvxvr
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%9:hvxvr = V6_vconv_hf_qf16 %8:hvxvr
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V6_vS32Ub_ai %2:intregs, 0, %9:hvxvr
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%10:hvxvr = V6_vmpy_qf16_hf %7:hvxvr, %9:hvxvr
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%11:hvxvr = V6_vconv_hf_qf16 %10:hvxvr
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V6_vS32Ub_ai %3:intregs, 0, %11:hvxvr
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