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94 lines
3.2 KiB
LLVM
94 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
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; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64
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define <32 x i8> @insert_extract_v32i8(<32 x i8> %a) nounwind {
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; CHECK-LABEL: insert_extract_v32i8:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvextrins.b $xr0, $xr0, 31
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; CHECK-NEXT: ret
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entry:
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%b_lo = extractelement <32 x i8> %a, i32 15
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%b_hi = extractelement <32 x i8> %a, i32 31
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%c = insertelement <32 x i8> %a, i8 %b_lo, i32 1
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%d = insertelement <32 x i8> %c, i8 %b_hi, i32 17
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ret <32 x i8> %d
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}
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define <16 x i16> @insert_extract_v16i16(<16 x i16> %a) nounwind {
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; CHECK-LABEL: insert_extract_v16i16:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvextrins.h $xr0, $xr0, 23
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; CHECK-NEXT: ret
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entry:
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%b_lo = extractelement <16 x i16> %a, i32 7
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%b_hi = extractelement <16 x i16> %a, i32 15
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%c = insertelement <16 x i16> %a, i16 %b_lo, i32 1
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%d = insertelement <16 x i16> %c, i16 %b_hi, i32 9
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ret <16 x i16> %d
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}
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define <8 x i32> @insert_extract_v8i32(<8 x i32> %a) nounwind {
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; CHECK-LABEL: insert_extract_v8i32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvextrins.w $xr0, $xr0, 19
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; CHECK-NEXT: ret
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entry:
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%b_lo = extractelement <8 x i32> %a, i32 3
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%b_hi = extractelement <8 x i32> %a, i32 7
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%c = insertelement <8 x i32> %a, i32 %b_lo, i32 1
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%d = insertelement <8 x i32> %c, i32 %b_hi, i32 5
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ret <8 x i32> %d
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}
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define <8 x float> @insert_extract_v8f32(<8 x float> %a) nounwind {
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; CHECK-LABEL: insert_extract_v8f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvextrins.w $xr0, $xr0, 19
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; CHECK-NEXT: ret
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entry:
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%b_lo = extractelement <8 x float> %a, i32 3
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%b_hi = extractelement <8 x float> %a, i32 7
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%c = insertelement <8 x float> %a, float %b_lo, i32 1
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%d = insertelement <8 x float> %c, float %b_hi, i32 5
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ret <8 x float> %d
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}
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define <4 x i64> @insert_extract_v4i64(<4 x i64> %a) nounwind {
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; LA32-LABEL: insert_extract_v4i64:
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; LA32: # %bb.0: # %entry
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; LA32-NEXT: xvpickve.w $xr1, $xr0, 2
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; LA32-NEXT: xvpickve.w $xr2, $xr0, 3
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; LA32-NEXT: xvpickve.w $xr3, $xr0, 6
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; LA32-NEXT: xvpickve.w $xr4, $xr0, 7
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; LA32-NEXT: xvinsve0.w $xr0, $xr1, 0
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; LA32-NEXT: xvinsve0.w $xr0, $xr2, 1
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; LA32-NEXT: xvinsve0.w $xr0, $xr3, 4
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; LA32-NEXT: xvinsve0.w $xr0, $xr4, 5
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; LA32-NEXT: ret
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;
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; LA64-LABEL: insert_extract_v4i64:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: xvextrins.d $xr0, $xr0, 1
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; LA64-NEXT: ret
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entry:
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%b_lo = extractelement <4 x i64> %a, i32 1
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%b_hi = extractelement <4 x i64> %a, i32 3
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%c = insertelement <4 x i64> %a, i64 %b_lo, i32 0
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%d = insertelement <4 x i64> %c, i64 %b_hi, i32 2
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ret <4 x i64> %d
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}
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define <4 x double> @insert_extract_v4f64(<4 x double> %a) nounwind {
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; CHECK-LABEL: insert_extract_v4f64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvextrins.d $xr0, $xr0, 1
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; CHECK-NEXT: ret
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entry:
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%b_lo = extractelement <4 x double> %a, i32 1
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%b_hi = extractelement <4 x double> %a, i32 3
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%c = insertelement <4 x double> %a, double %b_lo, i32 0
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%d = insertelement <4 x double> %c, double %b_hi, i32 2
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ret <4 x double> %d
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}
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