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106 lines
4.5 KiB
LLVM
106 lines
4.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; -nvptx-allow-ftz-atomics forces atomicrmw fadd to lower to atom.add even when
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; the hardware's FTZ behavior doesn't match the function's denormal mode, where
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; we'd otherwise emit a CAS loop. Compare the default lowering (DEFAULT) against
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; the flag (ALLOW).
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx87 | FileCheck %s --check-prefixes=CHECK,DEFAULT
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx87 -nvptx-allow-ftz-atomics | FileCheck %s --check-prefixes=CHECK,ALLOW
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; RUN: %if ptxas-sm_90 && ptxas-isa-8.7 %{ llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx87 | %ptxas-verify -arch=sm_90 %}
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; RUN: %if ptxas-sm_90 && ptxas-isa-8.7 %{ llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx87 -nvptx-allow-ftz-atomics | %ptxas-verify -arch=sm_90 %}
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; global f32: atom.add flushes, so default uses a CAS loop (function is not FTZ);
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; the flag forces atom.add.
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define float @fadd_f32_global(ptr addrspace(1) %addr, float %val) {
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; DEFAULT-LABEL: fadd_f32_global(
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; DEFAULT: {
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; DEFAULT-NEXT: .reg .pred %p<2>;
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; DEFAULT-NEXT: .reg .b32 %r<5>;
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; DEFAULT-NEXT: .reg .b64 %rd<2>;
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; DEFAULT-EMPTY:
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; DEFAULT-NEXT: // %bb.0:
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; DEFAULT-NEXT: ld.param.b32 %r2, [fadd_f32_global_param_1];
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; DEFAULT-NEXT: ld.param.b64 %rd1, [fadd_f32_global_param_0];
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; DEFAULT-NEXT: ld.relaxed.sys.global.b32 %r4, [%rd1];
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; DEFAULT-NEXT: $L__BB0_1: // %atomicrmw.start
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; DEFAULT-NEXT: // =>This Inner Loop Header: Depth=1
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; DEFAULT-NEXT: add.rn.f32 %r3, %r4, %r2;
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; DEFAULT-NEXT: atom.relaxed.sys.global.cas.b32 %r1, [%rd1], %r4, %r3;
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; DEFAULT-NEXT: setp.ne.b32 %p1, %r1, %r4;
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; DEFAULT-NEXT: mov.b32 %r4, %r1;
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; DEFAULT-NEXT: @%p1 bra $L__BB0_1;
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; DEFAULT-NEXT: // %bb.2: // %atomicrmw.end
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; DEFAULT-NEXT: st.param.b32 [func_retval0], %r1;
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; DEFAULT-NEXT: ret;
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;
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; ALLOW-LABEL: fadd_f32_global(
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; ALLOW: {
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; ALLOW-NEXT: .reg .b32 %r<3>;
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; ALLOW-NEXT: .reg .b64 %rd<2>;
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; ALLOW-EMPTY:
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; ALLOW-NEXT: // %bb.0:
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; ALLOW-NEXT: ld.param.b64 %rd1, [fadd_f32_global_param_0];
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; ALLOW-NEXT: ld.param.b32 %r1, [fadd_f32_global_param_1];
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; ALLOW-NEXT: atom.relaxed.sys.global.add.f32 %r2, [%rd1], %r1;
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; ALLOW-NEXT: st.param.b32 [func_retval0], %r2;
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; ALLOW-NEXT: ret;
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%r = atomicrmw fadd ptr addrspace(1) %addr, float %val monotonic
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ret float %r
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}
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; generic f32: we can't know the memory space, so default always uses a CAS loop;
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; the flag forces atom.add.
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define float @fadd_f32_generic(ptr %addr, float %val) {
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; DEFAULT-LABEL: fadd_f32_generic(
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; DEFAULT: {
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; DEFAULT-NEXT: .reg .pred %p<2>;
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; DEFAULT-NEXT: .reg .b32 %r<5>;
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; DEFAULT-NEXT: .reg .b64 %rd<2>;
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; DEFAULT-EMPTY:
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; DEFAULT-NEXT: // %bb.0:
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; DEFAULT-NEXT: ld.param.b32 %r2, [fadd_f32_generic_param_1];
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; DEFAULT-NEXT: ld.param.b64 %rd1, [fadd_f32_generic_param_0];
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; DEFAULT-NEXT: ld.relaxed.sys.b32 %r4, [%rd1];
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; DEFAULT-NEXT: $L__BB1_1: // %atomicrmw.start
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; DEFAULT-NEXT: // =>This Inner Loop Header: Depth=1
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; DEFAULT-NEXT: add.rn.f32 %r3, %r4, %r2;
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; DEFAULT-NEXT: atom.relaxed.sys.cas.b32 %r1, [%rd1], %r4, %r3;
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; DEFAULT-NEXT: setp.ne.b32 %p1, %r1, %r4;
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; DEFAULT-NEXT: mov.b32 %r4, %r1;
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; DEFAULT-NEXT: @%p1 bra $L__BB1_1;
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; DEFAULT-NEXT: // %bb.2: // %atomicrmw.end
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; DEFAULT-NEXT: st.param.b32 [func_retval0], %r1;
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; DEFAULT-NEXT: ret;
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;
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; ALLOW-LABEL: fadd_f32_generic(
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; ALLOW: {
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; ALLOW-NEXT: .reg .b32 %r<3>;
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; ALLOW-NEXT: .reg .b64 %rd<2>;
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; ALLOW-EMPTY:
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; ALLOW-NEXT: // %bb.0:
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; ALLOW-NEXT: ld.param.b64 %rd1, [fadd_f32_generic_param_0];
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; ALLOW-NEXT: ld.param.b32 %r1, [fadd_f32_generic_param_1];
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; ALLOW-NEXT: atom.relaxed.sys.add.f32 %r2, [%rd1], %r1;
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; ALLOW-NEXT: st.param.b32 [func_retval0], %r2;
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; ALLOW-NEXT: ret;
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%r = atomicrmw fadd ptr %addr, float %val monotonic
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ret float %r
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}
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; shared f32: atom.add does not flush, matching the non-FTZ function, so this is
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; atom.add either way.
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define float @fadd_f32_shared(ptr addrspace(3) %addr, float %val) {
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; CHECK-LABEL: fadd_f32_shared(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<3>;
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b64 %rd1, [fadd_f32_shared_param_0];
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; CHECK-NEXT: ld.param.b32 %r1, [fadd_f32_shared_param_1];
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; CHECK-NEXT: atom.relaxed.sys.shared.add.f32 %r2, [%rd1], %r1;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r2;
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; CHECK-NEXT: ret;
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%r = atomicrmw fadd ptr addrspace(3) %addr, float %val monotonic
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ret float %r
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}
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