derek.holloway
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71 lines
2.4 KiB
LLVM
71 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=nvptx -mcpu=sm_61 | FileCheck %s
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; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_61 | FileCheck %s
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target triple = "nvptx-nvidia-cuda"
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declare i32 @llvm.nvvm.fshr.clamp.i32(i32, i32, i32)
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declare i32 @llvm.nvvm.fshl.clamp.i32(i32, i32, i32)
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define i32 @fshr_clamp_r(i32 %hi, i32 %lo, i32 %n) {
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; CHECK-LABEL: fshr_clamp_r(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<5>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [fshr_clamp_r_param_0];
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; CHECK-NEXT: ld.param.b32 %r2, [fshr_clamp_r_param_1];
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; CHECK-NEXT: ld.param.b32 %r3, [fshr_clamp_r_param_2];
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; CHECK-NEXT: shf.r.clamp.b32 %r4, %r2, %r1, %r3;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r4;
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; CHECK-NEXT: ret;
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%call = call i32 @llvm.nvvm.fshr.clamp.i32(i32 %hi, i32 %lo, i32 %n)
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ret i32 %call
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}
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define i32 @fshl_clamp_r(i32 %hi, i32 %lo, i32 %n) {
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; CHECK-LABEL: fshl_clamp_r(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<5>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [fshl_clamp_r_param_0];
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; CHECK-NEXT: ld.param.b32 %r2, [fshl_clamp_r_param_1];
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; CHECK-NEXT: ld.param.b32 %r3, [fshl_clamp_r_param_2];
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; CHECK-NEXT: shf.l.clamp.b32 %r4, %r2, %r1, %r3;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r4;
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; CHECK-NEXT: ret;
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%call = call i32 @llvm.nvvm.fshl.clamp.i32(i32 %hi, i32 %lo, i32 %n)
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ret i32 %call
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}
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define i32 @fshr_clamp_i(i32 %hi, i32 %lo) {
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; CHECK-LABEL: fshr_clamp_i(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<4>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [fshr_clamp_i_param_0];
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; CHECK-NEXT: ld.param.b32 %r2, [fshr_clamp_i_param_1];
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; CHECK-NEXT: shf.r.clamp.b32 %r3, %r2, %r1, 3;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
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; CHECK-NEXT: ret;
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%call = call i32 @llvm.nvvm.fshr.clamp.i32(i32 %hi, i32 %lo, i32 3)
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ret i32 %call
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}
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define i32 @fshl_clamp_i(i32 %hi, i32 %lo) {
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; CHECK-LABEL: fshl_clamp_i(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<4>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [fshl_clamp_i_param_0];
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; CHECK-NEXT: ld.param.b32 %r2, [fshl_clamp_i_param_1];
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; CHECK-NEXT: shf.l.clamp.b32 %r3, %r2, %r1, 3;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
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; CHECK-NEXT: ret;
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%call = call i32 @llvm.nvvm.fshl.clamp.i32(i32 %hi, i32 %lo, i32 3)
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ret i32 %call
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}
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