derek.holloway
7502bf64a4
CodeQL / Analyze (actions) (push) Canceled after 0s
CodeQL / Analyze (python) (push) Canceled after 0s
pre-commit / pre-commit (push) Canceled after 0s
Multi-Arch CI / setup (push) Canceled after 0s
Publish build_manylinux_x86_64 images / publish_build_manylinux_x86_64 (push) Canceled after 0s
Setup (Multi-Arch) / setup (push) Canceled after 0s
Multi-Arch CI / Linux::${{ fromJSON(needs.setup.outputs.linux_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubi10 image / publish_no_rocm_image_ubi10 (push) Canceled after 0s
Multi-Arch CI / Windows::${{ fromJSON(needs.setup.outputs.windows_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Multi-Arch CI / Manifest Diff (push) Canceled after 0s
TheRock Manifest Diff Report / Generate Manifest Diff Report (push) Canceled after 0s
Multi-Arch CI / CI Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_ocl_rt images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_rocgdb images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Unit Tests / Unit Tests :: ubuntu-24.04 (push) Canceled after 0s
Unit Tests / Unit Tests :: windows-2022 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_media (push) Canceled after 0s
Unit Tests / Unit Tests Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_openmpi (push) Canceled after 0s
1491 lines
41 KiB
LLVM
1491 lines
41 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
|
|
; RUN: llc -mcpu=sm_100 < %s | FileCheck %s
|
|
; RUN: %if ptxas-sm_100 %{ llc < %s -mcpu=sm_100 | %ptxas-verify -arch=sm_100 %}
|
|
|
|
target triple = "nvptx64-nvidia-cuda"
|
|
|
|
define i32 @test_int16_slt_vs_sgt(i16 %a, i16 %b) {
|
|
; CHECK-LABEL: test_int16_slt_vs_sgt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_int16_slt_vs_sgt_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_int16_slt_vs_sgt_param_0];
|
|
; CHECK-NEXT: setp.lt.s16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB0_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB0_2: // %merge1
|
|
; CHECK-NEXT: setp.gt.s16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB0_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB0_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp slt i16 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp sgt i16 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int16_ult_vs_ugt(i16 %a, i16 %b) {
|
|
; CHECK-LABEL: test_int16_ult_vs_ugt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_int16_ult_vs_ugt_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_int16_ult_vs_ugt_param_0];
|
|
; CHECK-NEXT: setp.lt.u16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB1_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB1_2: // %merge1
|
|
; CHECK-NEXT: setp.gt.u16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB1_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB1_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp ult i16 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp ugt i16 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int16_slt_vs_uge(i16 %a, i16 %b) {
|
|
; CHECK-LABEL: test_int16_slt_vs_uge(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_int16_slt_vs_uge_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_int16_slt_vs_uge_param_0];
|
|
; CHECK-NEXT: setp.lt.s16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB2_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB2_2: // %merge1
|
|
; CHECK-NEXT: setp.ge.u16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB2_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB2_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp slt i16 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp uge i16 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int16_eq_vs_slt(i16 %a, i16 %b) {
|
|
; CHECK-LABEL: test_int16_eq_vs_slt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_int16_eq_vs_slt_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_int16_eq_vs_slt_param_0];
|
|
; CHECK-NEXT: setp.eq.b16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB3_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB3_2: // %merge1
|
|
; CHECK-NEXT: setp.lt.s16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB3_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB3_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp eq i16 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp slt i16 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int16_ult_vs_sge(i16 %a, i16 %b) {
|
|
; CHECK-LABEL: test_int16_ult_vs_sge(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_int16_ult_vs_sge_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_int16_ult_vs_sge_param_0];
|
|
; CHECK-NEXT: setp.lt.u16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB4_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB4_2: // %merge1
|
|
; CHECK-NEXT: setp.ge.s16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB4_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB4_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp ult i16 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp sge i16 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int32_slt_vs_sgt(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: test_int32_slt_vs_sgt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<4>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b32 %r2, [test_int32_slt_vs_sgt_param_1];
|
|
; CHECK-NEXT: ld.param.b32 %r1, [test_int32_slt_vs_sgt_param_0];
|
|
; CHECK-NEXT: setp.lt.s32 %p1, %r1, %r2;
|
|
; CHECK-NEXT: mov.b32 %r3, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB5_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r3, 1;
|
|
; CHECK-NEXT: $L__BB5_2: // %merge1
|
|
; CHECK-NEXT: setp.gt.s32 %p2, %r1, %r2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB5_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r3, 0;
|
|
; CHECK-NEXT: $L__BB5_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp slt i32 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp sgt i32 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int32_ult_vs_ugt(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: test_int32_ult_vs_ugt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<4>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b32 %r2, [test_int32_ult_vs_ugt_param_1];
|
|
; CHECK-NEXT: ld.param.b32 %r1, [test_int32_ult_vs_ugt_param_0];
|
|
; CHECK-NEXT: setp.lt.u32 %p1, %r1, %r2;
|
|
; CHECK-NEXT: mov.b32 %r3, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB6_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r3, 1;
|
|
; CHECK-NEXT: $L__BB6_2: // %merge1
|
|
; CHECK-NEXT: setp.gt.u32 %p2, %r1, %r2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB6_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r3, 0;
|
|
; CHECK-NEXT: $L__BB6_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp ult i32 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp ugt i32 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int32_slt_vs_uge(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: test_int32_slt_vs_uge(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<4>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b32 %r2, [test_int32_slt_vs_uge_param_1];
|
|
; CHECK-NEXT: ld.param.b32 %r1, [test_int32_slt_vs_uge_param_0];
|
|
; CHECK-NEXT: setp.lt.s32 %p1, %r1, %r2;
|
|
; CHECK-NEXT: mov.b32 %r3, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB7_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r3, 1;
|
|
; CHECK-NEXT: $L__BB7_2: // %merge1
|
|
; CHECK-NEXT: setp.ge.u32 %p2, %r1, %r2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB7_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r3, 0;
|
|
; CHECK-NEXT: $L__BB7_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp slt i32 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp uge i32 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int32_eq_vs_slt(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: test_int32_eq_vs_slt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<4>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b32 %r2, [test_int32_eq_vs_slt_param_1];
|
|
; CHECK-NEXT: ld.param.b32 %r1, [test_int32_eq_vs_slt_param_0];
|
|
; CHECK-NEXT: setp.eq.b32 %p1, %r1, %r2;
|
|
; CHECK-NEXT: mov.b32 %r3, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB8_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r3, 1;
|
|
; CHECK-NEXT: $L__BB8_2: // %merge1
|
|
; CHECK-NEXT: setp.lt.s32 %p2, %r1, %r2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB8_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r3, 0;
|
|
; CHECK-NEXT: $L__BB8_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp eq i32 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp slt i32 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int32_ult_vs_sge(i32 %a, i32 %b) {
|
|
; CHECK-LABEL: test_int32_ult_vs_sge(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<4>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b32 %r2, [test_int32_ult_vs_sge_param_1];
|
|
; CHECK-NEXT: ld.param.b32 %r1, [test_int32_ult_vs_sge_param_0];
|
|
; CHECK-NEXT: setp.lt.u32 %p1, %r1, %r2;
|
|
; CHECK-NEXT: mov.b32 %r3, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB9_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r3, 1;
|
|
; CHECK-NEXT: $L__BB9_2: // %merge1
|
|
; CHECK-NEXT: setp.ge.s32 %p2, %r1, %r2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB9_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r3, 0;
|
|
; CHECK-NEXT: $L__BB9_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp ult i32 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp sge i32 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int64_slt_vs_sgt(i64 %a, i64 %b) {
|
|
; CHECK-LABEL: test_int64_slt_vs_sgt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-NEXT: .reg .b64 %rd<3>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b64 %rd2, [test_int64_slt_vs_sgt_param_1];
|
|
; CHECK-NEXT: ld.param.b64 %rd1, [test_int64_slt_vs_sgt_param_0];
|
|
; CHECK-NEXT: setp.lt.s64 %p1, %rd1, %rd2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB10_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB10_2: // %merge1
|
|
; CHECK-NEXT: setp.gt.s64 %p2, %rd1, %rd2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB10_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB10_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp slt i64 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp sgt i64 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int64_ult_vs_ugt(i64 %a, i64 %b) {
|
|
; CHECK-LABEL: test_int64_ult_vs_ugt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-NEXT: .reg .b64 %rd<3>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b64 %rd2, [test_int64_ult_vs_ugt_param_1];
|
|
; CHECK-NEXT: ld.param.b64 %rd1, [test_int64_ult_vs_ugt_param_0];
|
|
; CHECK-NEXT: setp.lt.u64 %p1, %rd1, %rd2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB11_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB11_2: // %merge1
|
|
; CHECK-NEXT: setp.gt.u64 %p2, %rd1, %rd2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB11_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB11_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp ult i64 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp ugt i64 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int64_slt_vs_uge(i64 %a, i64 %b) {
|
|
; CHECK-LABEL: test_int64_slt_vs_uge(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-NEXT: .reg .b64 %rd<3>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b64 %rd2, [test_int64_slt_vs_uge_param_1];
|
|
; CHECK-NEXT: ld.param.b64 %rd1, [test_int64_slt_vs_uge_param_0];
|
|
; CHECK-NEXT: setp.lt.s64 %p1, %rd1, %rd2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB12_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB12_2: // %merge1
|
|
; CHECK-NEXT: setp.ge.u64 %p2, %rd1, %rd2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB12_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB12_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp slt i64 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp uge i64 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int64_eq_vs_slt(i64 %a, i64 %b) {
|
|
; CHECK-LABEL: test_int64_eq_vs_slt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-NEXT: .reg .b64 %rd<3>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b64 %rd2, [test_int64_eq_vs_slt_param_1];
|
|
; CHECK-NEXT: ld.param.b64 %rd1, [test_int64_eq_vs_slt_param_0];
|
|
; CHECK-NEXT: setp.eq.b64 %p1, %rd1, %rd2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB13_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB13_2: // %merge1
|
|
; CHECK-NEXT: setp.lt.s64 %p2, %rd1, %rd2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB13_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB13_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp eq i64 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp slt i64 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_int64_ult_vs_sge(i64 %a, i64 %b) {
|
|
; CHECK-LABEL: test_int64_ult_vs_sge(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-NEXT: .reg .b64 %rd<3>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b64 %rd2, [test_int64_ult_vs_sge_param_1];
|
|
; CHECK-NEXT: ld.param.b64 %rd1, [test_int64_ult_vs_sge_param_0];
|
|
; CHECK-NEXT: setp.lt.u64 %p1, %rd1, %rd2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB14_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB14_2: // %merge1
|
|
; CHECK-NEXT: setp.ge.s64 %p2, %rd1, %rd2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB14_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB14_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = icmp ult i64 %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = icmp sge i64 %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_bfloat16_ueq_vs_une(bfloat %a, bfloat %b) {
|
|
; CHECK-LABEL: test_bfloat16_ueq_vs_une(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_bfloat16_ueq_vs_une_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_bfloat16_ueq_vs_une_param_0];
|
|
; CHECK-NEXT: setp.equ.bf16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB15_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB15_2: // %merge1
|
|
; CHECK-NEXT: setp.neu.bf16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB15_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB15_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp ueq bfloat %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp une bfloat %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_bfloat16_oeq_vs_one(bfloat %a, bfloat %b) {
|
|
; CHECK-LABEL: test_bfloat16_oeq_vs_one(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_bfloat16_oeq_vs_one_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_bfloat16_oeq_vs_one_param_0];
|
|
; CHECK-NEXT: setp.eq.bf16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB16_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB16_2: // %merge1
|
|
; CHECK-NEXT: setp.ne.bf16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB16_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB16_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp oeq bfloat %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp one bfloat %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_bfloat16_olt_vs_ogt(bfloat %a, bfloat %b) {
|
|
; CHECK-LABEL: test_bfloat16_olt_vs_ogt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_bfloat16_olt_vs_ogt_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_bfloat16_olt_vs_ogt_param_0];
|
|
; CHECK-NEXT: setp.lt.bf16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB17_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB17_2: // %merge1
|
|
; CHECK-NEXT: setp.gt.bf16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB17_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB17_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp olt bfloat %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp ogt bfloat %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_bfloat16_ult_vs_ugt(bfloat %a, bfloat %b) {
|
|
; CHECK-LABEL: test_bfloat16_ult_vs_ugt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_bfloat16_ult_vs_ugt_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_bfloat16_ult_vs_ugt_param_0];
|
|
; CHECK-NEXT: setp.ltu.bf16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB18_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB18_2: // %merge1
|
|
; CHECK-NEXT: setp.gtu.bf16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB18_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB18_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp ult bfloat %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp ugt bfloat %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_bfloat16_oeq_vs_olt(bfloat %a, bfloat %b) {
|
|
; CHECK-LABEL: test_bfloat16_oeq_vs_olt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_bfloat16_oeq_vs_olt_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_bfloat16_oeq_vs_olt_param_0];
|
|
; CHECK-NEXT: setp.eq.bf16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB19_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB19_2: // %merge1
|
|
; CHECK-NEXT: setp.lt.bf16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB19_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB19_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp oeq bfloat %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp olt bfloat %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float16_ueq_vs_une(half %a, half %b) {
|
|
; CHECK-LABEL: test_float16_ueq_vs_une(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_float16_ueq_vs_une_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_float16_ueq_vs_une_param_0];
|
|
; CHECK-NEXT: setp.equ.f16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB20_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB20_2: // %merge1
|
|
; CHECK-NEXT: setp.neu.f16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB20_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB20_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp ueq half %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp une half %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float16_oeq_vs_one(half %a, half %b) {
|
|
; CHECK-LABEL: test_float16_oeq_vs_one(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_float16_oeq_vs_one_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_float16_oeq_vs_one_param_0];
|
|
; CHECK-NEXT: setp.eq.f16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB21_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB21_2: // %merge1
|
|
; CHECK-NEXT: setp.ne.f16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB21_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB21_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp oeq half %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp one half %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float16_olt_vs_ogt(half %a, half %b) {
|
|
; CHECK-LABEL: test_float16_olt_vs_ogt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_float16_olt_vs_ogt_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_float16_olt_vs_ogt_param_0];
|
|
; CHECK-NEXT: setp.lt.f16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB22_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB22_2: // %merge1
|
|
; CHECK-NEXT: setp.gt.f16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB22_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB22_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp olt half %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp ogt half %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float16_ult_vs_ugt(half %a, half %b) {
|
|
; CHECK-LABEL: test_float16_ult_vs_ugt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_float16_ult_vs_ugt_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_float16_ult_vs_ugt_param_0];
|
|
; CHECK-NEXT: setp.ltu.f16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB23_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB23_2: // %merge1
|
|
; CHECK-NEXT: setp.gtu.f16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB23_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB23_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp ult half %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp ugt half %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float16_oeq_vs_olt(half %a, half %b) {
|
|
; CHECK-LABEL: test_float16_oeq_vs_olt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b16 %rs<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b16 %rs2, [test_float16_oeq_vs_olt_param_1];
|
|
; CHECK-NEXT: ld.param.b16 %rs1, [test_float16_oeq_vs_olt_param_0];
|
|
; CHECK-NEXT: setp.eq.f16 %p1, %rs1, %rs2;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB24_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB24_2: // %merge1
|
|
; CHECK-NEXT: setp.lt.f16 %p2, %rs1, %rs2;
|
|
; CHECK-NEXT: @%p2 bra $L__BB24_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB24_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp oeq half %a, %b
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp olt half %a, %b
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float32_ueq_vs_une(float %arg) {
|
|
; CHECK-LABEL: test_float32_ueq_vs_une(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<3>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b32 %r1, [test_float32_ueq_vs_une_param_0];
|
|
; CHECK-NEXT: setp.equ.f32 %p1, %r1, 0f00000000;
|
|
; CHECK-NEXT: mov.b32 %r2, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB25_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r2, 1;
|
|
; CHECK-NEXT: $L__BB25_2: // %merge1
|
|
; CHECK-NEXT: setp.neu.f32 %p2, %r1, 0f00000000;
|
|
; CHECK-NEXT: @%p2 bra $L__BB25_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r2, 0;
|
|
; CHECK-NEXT: $L__BB25_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r2;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp ueq float %arg, 0.000000e+00
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp une float %arg, 0.000000e+00
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float32_oeq_vs_one(float %arg) {
|
|
; CHECK-LABEL: test_float32_oeq_vs_one(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<3>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b32 %r1, [test_float32_oeq_vs_one_param_0];
|
|
; CHECK-NEXT: setp.eq.f32 %p1, %r1, 0f00000000;
|
|
; CHECK-NEXT: mov.b32 %r2, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB26_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r2, 1;
|
|
; CHECK-NEXT: $L__BB26_2: // %merge1
|
|
; CHECK-NEXT: setp.ne.f32 %p2, %r1, 0f00000000;
|
|
; CHECK-NEXT: @%p2 bra $L__BB26_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r2, 0;
|
|
; CHECK-NEXT: $L__BB26_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r2;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp oeq float %arg, 0.000000e+00
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp one float %arg, 0.000000e+00
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float32_olt_vs_ogt(float %arg) {
|
|
; CHECK-LABEL: test_float32_olt_vs_ogt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<3>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b32 %r1, [test_float32_olt_vs_ogt_param_0];
|
|
; CHECK-NEXT: setp.lt.f32 %p1, %r1, 0f00000000;
|
|
; CHECK-NEXT: mov.b32 %r2, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB27_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r2, 1;
|
|
; CHECK-NEXT: $L__BB27_2: // %merge1
|
|
; CHECK-NEXT: setp.gt.f32 %p2, %r1, 0f00000000;
|
|
; CHECK-NEXT: @%p2 bra $L__BB27_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r2, 0;
|
|
; CHECK-NEXT: $L__BB27_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r2;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp olt float %arg, 0.000000e+00
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp ogt float %arg, 0.000000e+00
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float32_ult_vs_ugt(float %arg) {
|
|
; CHECK-LABEL: test_float32_ult_vs_ugt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<3>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b32 %r1, [test_float32_ult_vs_ugt_param_0];
|
|
; CHECK-NEXT: setp.ltu.f32 %p1, %r1, 0f00000000;
|
|
; CHECK-NEXT: mov.b32 %r2, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB28_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r2, 1;
|
|
; CHECK-NEXT: $L__BB28_2: // %merge1
|
|
; CHECK-NEXT: setp.gtu.f32 %p2, %r1, 0f00000000;
|
|
; CHECK-NEXT: @%p2 bra $L__BB28_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r2, 0;
|
|
; CHECK-NEXT: $L__BB28_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r2;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp ult float %arg, 0.000000e+00
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp ugt float %arg, 0.000000e+00
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float32_oeq_vs_olt(float %arg) {
|
|
; CHECK-LABEL: test_float32_oeq_vs_olt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<3>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b32 %r1, [test_float32_oeq_vs_olt_param_0];
|
|
; CHECK-NEXT: setp.eq.f32 %p1, %r1, 0f00000000;
|
|
; CHECK-NEXT: mov.b32 %r2, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB29_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r2, 1;
|
|
; CHECK-NEXT: $L__BB29_2: // %merge1
|
|
; CHECK-NEXT: setp.lt.f32 %p2, %r1, 0f00000000;
|
|
; CHECK-NEXT: @%p2 bra $L__BB29_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r2, 0;
|
|
; CHECK-NEXT: $L__BB29_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r2;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp oeq float %arg, 0.000000e+00
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp olt float %arg, 0.000000e+00
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float64_ueq_vs_une(double %arg) {
|
|
; CHECK-LABEL: test_float64_ueq_vs_une(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-NEXT: .reg .b64 %rd<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b64 %rd1, [test_float64_ueq_vs_une_param_0];
|
|
; CHECK-NEXT: setp.equ.f64 %p1, %rd1, 0d0000000000000000;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB30_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB30_2: // %merge1
|
|
; CHECK-NEXT: setp.neu.f64 %p2, %rd1, 0d0000000000000000;
|
|
; CHECK-NEXT: @%p2 bra $L__BB30_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB30_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp ueq double %arg, 0.000000e+00
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp une double %arg, 0.000000e+00
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float64_oeq_vs_one(double %arg) {
|
|
; CHECK-LABEL: test_float64_oeq_vs_one(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-NEXT: .reg .b64 %rd<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b64 %rd1, [test_float64_oeq_vs_one_param_0];
|
|
; CHECK-NEXT: setp.eq.f64 %p1, %rd1, 0d0000000000000000;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB31_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB31_2: // %merge1
|
|
; CHECK-NEXT: setp.ne.f64 %p2, %rd1, 0d0000000000000000;
|
|
; CHECK-NEXT: @%p2 bra $L__BB31_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB31_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp oeq double %arg, 0.000000e+00
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp one double %arg, 0.000000e+00
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float64_olt_vs_ogt(double %arg) {
|
|
; CHECK-LABEL: test_float64_olt_vs_ogt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-NEXT: .reg .b64 %rd<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b64 %rd1, [test_float64_olt_vs_ogt_param_0];
|
|
; CHECK-NEXT: setp.lt.f64 %p1, %rd1, 0d0000000000000000;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB32_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB32_2: // %merge1
|
|
; CHECK-NEXT: setp.gt.f64 %p2, %rd1, 0d0000000000000000;
|
|
; CHECK-NEXT: @%p2 bra $L__BB32_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB32_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp olt double %arg, 0.000000e+00
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp ogt double %arg, 0.000000e+00
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float64_ult_vs_ugt(double %arg) {
|
|
; CHECK-LABEL: test_float64_ult_vs_ugt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-NEXT: .reg .b64 %rd<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b64 %rd1, [test_float64_ult_vs_ugt_param_0];
|
|
; CHECK-NEXT: setp.ltu.f64 %p1, %rd1, 0d0000000000000000;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB33_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB33_2: // %merge1
|
|
; CHECK-NEXT: setp.gtu.f64 %p2, %rd1, 0d0000000000000000;
|
|
; CHECK-NEXT: @%p2 bra $L__BB33_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB33_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp ult double %arg, 0.000000e+00
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp ugt double %arg, 0.000000e+00
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|
|
|
|
define i32 @test_float64_oeq_vs_olt(double %arg) {
|
|
; CHECK-LABEL: test_float64_oeq_vs_olt(
|
|
; CHECK: {
|
|
; CHECK-NEXT: .reg .pred %p<3>;
|
|
; CHECK-NEXT: .reg .b32 %r<2>;
|
|
; CHECK-NEXT: .reg .b64 %rd<2>;
|
|
; CHECK-EMPTY:
|
|
; CHECK-NEXT: // %bb.0: // %entry
|
|
; CHECK-NEXT: ld.param.b64 %rd1, [test_float64_oeq_vs_olt_param_0];
|
|
; CHECK-NEXT: setp.eq.f64 %p1, %rd1, 0d0000000000000000;
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: @%p1 bra $L__BB34_2;
|
|
; CHECK-NEXT: // %bb.1: // %then
|
|
; CHECK-NEXT: mov.b32 %r1, 1;
|
|
; CHECK-NEXT: $L__BB34_2: // %merge1
|
|
; CHECK-NEXT: setp.lt.f64 %p2, %rd1, 0d0000000000000000;
|
|
; CHECK-NEXT: @%p2 bra $L__BB34_4;
|
|
; CHECK-NEXT: // %bb.3: // %else
|
|
; CHECK-NEXT: mov.b32 %r1, 0;
|
|
; CHECK-NEXT: $L__BB34_4: // %merge2
|
|
; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
|
|
; CHECK-NEXT: ret;
|
|
entry:
|
|
%cmp = fcmp oeq double %arg, 0.000000e+00
|
|
br i1 %cmp, label %merge1, label %then
|
|
|
|
then:
|
|
br label %merge1
|
|
|
|
merge1:
|
|
%phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
|
|
%cmp2 = fcmp olt double %arg, 0.000000e+00
|
|
br i1 %cmp2, label %merge2, label %else
|
|
|
|
else:
|
|
br label %merge2
|
|
|
|
merge2:
|
|
%phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
|
|
ret i32 %phi2
|
|
}
|