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101 lines
3.1 KiB
LLVM
101 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -mtriple=powerpc64le-unknown-linux-gnu < %s | \
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; RUN: FileCheck %s --check-prefix=COMMON
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; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -mtriple=powerpc64-ibm-aix < %s | \
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; RUN: FileCheck %s --check-prefix=COMMON
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; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -mtriple=powerpc-ibm-aix < %s | \
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; RUN: FileCheck %s --check-prefix=CHECK-AIX32
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; Test that assertions related to the range metadata when converting from i64
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; to i32 does not occur.
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define float @case_i64_uitofp_f32(ptr %p) {
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; COMMON-LABEL: case_i64_uitofp_f32:
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; COMMON: # %bb.0: # %entry
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; COMMON-NEXT: lfd f0, 0(r3)
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; COMMON-NEXT: xscvuxdsp f1, f0
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; COMMON-NEXT: blr
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;
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; CHECK-AIX32-LABEL: case_i64_uitofp_f32:
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; CHECK-AIX32: # %bb.0: # %entry
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; CHECK-AIX32-NEXT: lwz r4, 4(r3)
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; CHECK-AIX32-NEXT: stw r4, -4(r1)
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; CHECK-AIX32-NEXT: lwz r3, 0(r3)
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; CHECK-AIX32-NEXT: stw r3, -8(r1)
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; CHECK-AIX32-NEXT: lfd f0, -8(r1)
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; CHECK-AIX32-NEXT: xscvuxdsp f1, f0
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; CHECK-AIX32-NEXT: blr
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entry:
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%x = load i64, ptr %p, align 8, !range !0
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%y = uitofp i64 %x to float
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ret float %y
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}
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define double @case_i64_sitofp_f64(ptr %p) {
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; COMMON-LABEL: case_i64_sitofp_f64:
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; COMMON: # %bb.0: # %entry
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; COMMON-NEXT: lfd f0, 0(r3)
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; COMMON-NEXT: xscvsxddp f1, f0
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; COMMON-NEXT: blr
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;
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; CHECK-AIX32-LABEL: case_i64_sitofp_f64:
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; CHECK-AIX32: # %bb.0: # %entry
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; CHECK-AIX32-NEXT: lwz r4, 4(r3)
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; CHECK-AIX32-NEXT: stw r4, -4(r1)
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; CHECK-AIX32-NEXT: lwz r3, 0(r3)
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; CHECK-AIX32-NEXT: stw r3, -8(r1)
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; CHECK-AIX32-NEXT: lfd f0, -8(r1)
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; CHECK-AIX32-NEXT: xscvsxddp f1, f0
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; CHECK-AIX32-NEXT: blr
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entry:
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%x = load i64, ptr %p, align 8, !range !0
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%y = sitofp i64 %x to double
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ret double %y
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}
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define double @case_i64_uitofp_f64(ptr %p) {
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; COMMON-LABEL: case_i64_uitofp_f64:
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; COMMON: # %bb.0: # %entry
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; COMMON-NEXT: lfd f0, 0(r3)
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; COMMON-NEXT: xscvuxddp f1, f0
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; COMMON-NEXT: blr
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;
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; CHECK-AIX32-LABEL: case_i64_uitofp_f64:
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; CHECK-AIX32: # %bb.0: # %entry
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; CHECK-AIX32-NEXT: lwz r4, 4(r3)
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; CHECK-AIX32-NEXT: stw r4, -4(r1)
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; CHECK-AIX32-NEXT: lwz r3, 0(r3)
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; CHECK-AIX32-NEXT: stw r3, -8(r1)
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; CHECK-AIX32-NEXT: lfd f0, -8(r1)
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; CHECK-AIX32-NEXT: xscvuxddp f1, f0
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; CHECK-AIX32-NEXT: blr
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entry:
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%x = load i64, ptr %p, align 8, !range !0
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%y = uitofp i64 %x to double
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ret double %y
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}
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define float @case_i64_sitofp_f32(ptr %p) {
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; COMMON-LABEL: case_i64_sitofp_f32:
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; COMMON: # %bb.0: # %entry
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; COMMON-NEXT: lfd f0, 0(r3)
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; COMMON-NEXT: xscvsxdsp f1, f0
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; COMMON-NEXT: blr
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;
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; CHECK-AIX32-LABEL: case_i64_sitofp_f32:
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; CHECK-AIX32: # %bb.0: # %entry
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; CHECK-AIX32-NEXT: lwz r4, 4(r3)
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; CHECK-AIX32-NEXT: stw r4, -4(r1)
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; CHECK-AIX32-NEXT: lwz r3, 0(r3)
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; CHECK-AIX32-NEXT: stw r3, -8(r1)
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; CHECK-AIX32-NEXT: lfd f0, -8(r1)
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; CHECK-AIX32-NEXT: xscvsxdsp f1, f0
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; CHECK-AIX32-NEXT: blr
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entry:
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%x = load i64, ptr %p, align 8, !range !0
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%y = sitofp i64 %x to float
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ret float %y
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}
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!0 = !{i64 1, i64 0}
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