derek.holloway
7502bf64a4
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137 lines
4.6 KiB
LLVM
137 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc -mtriple=riscv32 -mattr=+zbkb -global-isel \
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; RUN: -global-isel-abort=1 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefix=RV32ZBKB
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; RUN: llc -mtriple=riscv64 -mattr=+zbkb -global-isel \
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; RUN: -global-isel-abort=1 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefix=RV64ZBKB
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; RUN: llc -mtriple=riscv32 -global-isel \
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; RUN: -global-isel-abort=1 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefix=RV32NOZBKB
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; RUN: llc -mtriple=riscv64 -global-isel \
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; RUN: -global-isel-abort=1 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefix=RV64NOZBKB
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declare i8 @llvm.bitreverse.i8(i8)
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define zeroext i8 @bitreverse_i8_zext_arg(i8 zeroext %x) {
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; RV32ZBKB-LABEL: bitreverse_i8_zext_arg:
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; RV32ZBKB: # %bb.0:
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; RV32ZBKB-NEXT: brev8 a0, a0
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; RV32ZBKB-NEXT: ret
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;
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; RV64ZBKB-LABEL: bitreverse_i8_zext_arg:
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; RV64ZBKB: # %bb.0:
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; RV64ZBKB-NEXT: brev8 a0, a0
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; RV64ZBKB-NEXT: ret
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;
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; RV32NOZBKB-LABEL: bitreverse_i8_zext_arg:
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; RV32NOZBKB: # %bb.0:
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; RV32NOZBKB-NEXT: andi a1, a0, -16
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; RV32NOZBKB-NEXT: slli a0, a0, 4
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; RV32NOZBKB-NEXT: srli a1, a1, 4
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; RV32NOZBKB-NEXT: or a0, a1, a0
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; RV32NOZBKB-NEXT: andi a1, a0, -52
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; RV32NOZBKB-NEXT: slli a0, a0, 2
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; RV32NOZBKB-NEXT: zext.b a1, a1
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; RV32NOZBKB-NEXT: andi a0, a0, -52
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; RV32NOZBKB-NEXT: srli a1, a1, 2
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; RV32NOZBKB-NEXT: or a0, a1, a0
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; RV32NOZBKB-NEXT: andi a1, a0, -86
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; RV32NOZBKB-NEXT: slli a0, a0, 1
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; RV32NOZBKB-NEXT: zext.b a1, a1
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; RV32NOZBKB-NEXT: srli a1, a1, 1
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; RV32NOZBKB-NEXT: andi a0, a0, -86
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; RV32NOZBKB-NEXT: or a0, a1, a0
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; RV32NOZBKB-NEXT: zext.b a0, a0
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; RV32NOZBKB-NEXT: ret
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;
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; RV64NOZBKB-LABEL: bitreverse_i8_zext_arg:
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; RV64NOZBKB: # %bb.0:
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; RV64NOZBKB-NEXT: andi a1, a0, -16
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; RV64NOZBKB-NEXT: slli a0, a0, 4
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; RV64NOZBKB-NEXT: srli a1, a1, 4
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; RV64NOZBKB-NEXT: or a0, a1, a0
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; RV64NOZBKB-NEXT: andi a1, a0, -52
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; RV64NOZBKB-NEXT: slli a0, a0, 2
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; RV64NOZBKB-NEXT: zext.b a1, a1
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; RV64NOZBKB-NEXT: andi a0, a0, -52
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; RV64NOZBKB-NEXT: srli a1, a1, 2
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; RV64NOZBKB-NEXT: or a0, a1, a0
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; RV64NOZBKB-NEXT: andi a1, a0, -86
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; RV64NOZBKB-NEXT: slli a0, a0, 1
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; RV64NOZBKB-NEXT: zext.b a1, a1
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; RV64NOZBKB-NEXT: srli a1, a1, 1
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; RV64NOZBKB-NEXT: andi a0, a0, -86
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; RV64NOZBKB-NEXT: or a0, a1, a0
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; RV64NOZBKB-NEXT: zext.b a0, a0
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; RV64NOZBKB-NEXT: ret
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%r = call i8 @llvm.bitreverse.i8(i8 %x)
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ret i8 %r
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}
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define zeroext i8 @bitreverse_i8_plain_arg(i8 %x) {
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; RV32ZBKB-LABEL: bitreverse_i8_plain_arg:
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; RV32ZBKB: # %bb.0:
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; RV32ZBKB-NEXT: brev8 a0, a0
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; RV32ZBKB-NEXT: zext.b a0, a0
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; RV32ZBKB-NEXT: ret
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;
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; RV64ZBKB-LABEL: bitreverse_i8_plain_arg:
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; RV64ZBKB: # %bb.0:
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; RV64ZBKB-NEXT: brev8 a0, a0
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; RV64ZBKB-NEXT: zext.b a0, a0
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; RV64ZBKB-NEXT: ret
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;
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; RV32NOZBKB-LABEL: bitreverse_i8_plain_arg:
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; RV32NOZBKB: # %bb.0:
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; RV32NOZBKB-NEXT: zext.b a1, a0
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; RV32NOZBKB-NEXT: or a0, a1, a0
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; RV32NOZBKB-NEXT: andi a1, a0, -16
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; RV32NOZBKB-NEXT: slli a0, a0, 4
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; RV32NOZBKB-NEXT: zext.b a1, a1
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; RV32NOZBKB-NEXT: srli a1, a1, 4
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; RV32NOZBKB-NEXT: or a0, a1, a0
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; RV32NOZBKB-NEXT: andi a1, a0, -52
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; RV32NOZBKB-NEXT: slli a0, a0, 2
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; RV32NOZBKB-NEXT: zext.b a1, a1
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; RV32NOZBKB-NEXT: andi a0, a0, -52
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; RV32NOZBKB-NEXT: srli a1, a1, 2
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; RV32NOZBKB-NEXT: or a0, a1, a0
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; RV32NOZBKB-NEXT: andi a1, a0, -86
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; RV32NOZBKB-NEXT: slli a0, a0, 1
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; RV32NOZBKB-NEXT: zext.b a1, a1
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; RV32NOZBKB-NEXT: srli a1, a1, 1
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; RV32NOZBKB-NEXT: andi a0, a0, -86
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; RV32NOZBKB-NEXT: or a0, a1, a0
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; RV32NOZBKB-NEXT: zext.b a0, a0
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; RV32NOZBKB-NEXT: ret
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;
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; RV64NOZBKB-LABEL: bitreverse_i8_plain_arg:
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; RV64NOZBKB: # %bb.0:
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; RV64NOZBKB-NEXT: zext.b a1, a0
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; RV64NOZBKB-NEXT: or a0, a1, a0
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; RV64NOZBKB-NEXT: andi a1, a0, -16
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; RV64NOZBKB-NEXT: slli a0, a0, 4
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; RV64NOZBKB-NEXT: zext.b a1, a1
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; RV64NOZBKB-NEXT: srli a1, a1, 4
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; RV64NOZBKB-NEXT: or a0, a1, a0
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; RV64NOZBKB-NEXT: andi a1, a0, -52
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; RV64NOZBKB-NEXT: slli a0, a0, 2
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; RV64NOZBKB-NEXT: zext.b a1, a1
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; RV64NOZBKB-NEXT: andi a0, a0, -52
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; RV64NOZBKB-NEXT: srli a1, a1, 2
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; RV64NOZBKB-NEXT: or a0, a1, a0
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; RV64NOZBKB-NEXT: andi a1, a0, -86
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; RV64NOZBKB-NEXT: slli a0, a0, 1
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; RV64NOZBKB-NEXT: zext.b a1, a1
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; RV64NOZBKB-NEXT: srli a1, a1, 1
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; RV64NOZBKB-NEXT: andi a0, a0, -86
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; RV64NOZBKB-NEXT: or a0, a1, a0
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; RV64NOZBKB-NEXT: zext.b a0, a0
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; RV64NOZBKB-NEXT: ret
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%r = call i8 @llvm.bitreverse.i8(i8 %x)
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ret i8 %r
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}
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