derek.holloway
7502bf64a4
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49 lines
2.0 KiB
LLVM
49 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=riscv64 -mattr=+v -verify-machineinstrs | FileCheck %s
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define <vscale x 1 x i1> @sew1_srli(<vscale x 1 x i1> %a, <vscale x 1 x i1> %b) {
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; CHECK-LABEL: sew1_srli:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma
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; CHECK-NEXT: vmand.mm v0, v0, v8
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; CHECK-NEXT: ret
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%vlmax = call i32 @llvm.vscale()
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%x = call <vscale x 1 x i1> @llvm.vp.and.nxv1i1(<vscale x 1 x i1> %a, <vscale x 1 x i1> %b, <vscale x 1 x i1> splat (i1 true), i32 %vlmax)
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ret <vscale x 1 x i1> %x
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}
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define <vscale x 1 x i64> @sew64_srli(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b) {
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; CHECK-LABEL: sew64_srli:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
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; CHECK-NEXT: vadd.vv v8, v8, v9
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; CHECK-NEXT: ret
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%vlmax = call i32 @llvm.vscale()
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%x = call <vscale x 1 x i64> @llvm.vp.add.nxv1i64(<vscale x 1 x i64> %a, <vscale x 1 x i64> %b, <vscale x 1 x i1> splat (i1 true), i32 %vlmax)
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ret <vscale x 1 x i64> %x
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}
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define <vscale x 8 x i64> @sew64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b) {
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; CHECK-LABEL: sew64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
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; CHECK-NEXT: vadd.vv v8, v8, v16
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; CHECK-NEXT: ret
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%vscale = call i32 @llvm.vscale()
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%vlmax = shl i32 %vscale, 3
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%x = call <vscale x 8 x i64> @llvm.vp.add.nxv8i64(<vscale x 8 x i64> %a, <vscale x 8 x i64> %b, <vscale x 8 x i1> splat (i1 true), i32 %vlmax)
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ret <vscale x 8 x i64> %x
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}
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define <vscale x 16 x i32> @sew32_sll(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b) {
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; CHECK-LABEL: sew32_sll:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma
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; CHECK-NEXT: vadd.vv v8, v8, v16
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; CHECK-NEXT: ret
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%vscale = call i32 @llvm.vscale()
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%vlmax = shl i32 %vscale, 4
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%x = call <vscale x 16 x i32> @llvm.vp.add.nxv16i32(<vscale x 16 x i32> %a, <vscale x 16 x i32> %b, <vscale x 16 x i1> splat (i1 true), i32 %vlmax)
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ret <vscale x 16 x i32> %x
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}
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