derek.holloway
7502bf64a4
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44 lines
1.7 KiB
LLVM
44 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux -mcpu=x86-64 | FileCheck %s
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define x86_fp80 @rem_pio2l_min(x86_fp80 %z) {
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; CHECK-LABEL: rem_pio2l_min:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
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; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
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; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax
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; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}(%rip)
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; CHECK-NEXT: fmul %st, %st(1)
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; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
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; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: fxch %st(1)
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; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax
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; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: fmulp %st, %st(1)
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; CHECK-NEXT: retq
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entry:
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%conv = fptosi x86_fp80 %z to i32
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%conv1 = sitofp i32 %conv to x86_fp80
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%sub = fsub x86_fp80 %z, %conv1
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%mul = fmul x86_fp80 %sub, 0xK40178000000000000000
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%conv2 = fptosi x86_fp80 %mul to i32
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%conv3 = sitofp i32 %conv2 to x86_fp80
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%sub4 = fsub x86_fp80 %mul, %conv3
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%mul5 = fmul x86_fp80 %sub4, 0xK40178000000000000000
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ret x86_fp80 %mul5
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}
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