derek.holloway
7502bf64a4
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30 lines
1.4 KiB
LLVM
30 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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; Verify that we don't crash when compiling this. We used to hit an
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; assert like this
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;
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; llc: ../include/llvm/CodeGen/ValueTypes.h:251: llvm::MVT llvm::EVT::getSimpleVT() const: Assertion `isSimple() && "Expected a SimpleValueType!"' failed.
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;
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; due to getFauxShuffleMask not checking that the VT was simple before a call
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; to getSimpleValueType().
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define i1 @dont_hit_assert(i24 signext %d) {
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; CHECK-LABEL: dont_hit_assert:
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; CHECK: # %bb.0: # %for.cond
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: retq
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for.cond:
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%t0 = insertelement <8 x i24> zeroinitializer, i24 1, i32 0
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%t5 = icmp slt <8 x i24> %t0, zeroinitializer
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%t7 = icmp slt i24 0, %d
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%rdx.shuf = shufflevector <8 x i1> %t5, <8 x i1> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx = and <8 x i1> %t5, %rdx.shuf
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%rdx.shuf22 = shufflevector <8 x i1> %bin.rdx, <8 x i1> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx23 = and <8 x i1> %bin.rdx, %rdx.shuf22
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%rdx.shuf24 = shufflevector <8 x i1> %bin.rdx23, <8 x i1> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx25 = and <8 x i1> %bin.rdx23, %rdx.shuf24
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%t8 = extractelement <8 x i1> %bin.rdx25, i32 0
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ret i1 %t8
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}
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