derek.holloway
7502bf64a4
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63 lines
2.6 KiB
LLVM
63 lines
2.6 KiB
LLVM
; RUN: llc -O1 -debug %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=LLC-Ox
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; RUN: llc -O2 -debug %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=LLC-Ox
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; RUN: llc -O3 -debug %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=LLC-Ox
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; RUN: llc -misched-postra -debug %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=LLC-MORE
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; RUN: llc -O1 -debug-only=isel %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=FAST
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; RUN: llc -O1 -debug-only=isel -fast-isel=false %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=NOFAST
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; REQUIRES: asserts, default_triple
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; AArch64 uses GlobalISel for optnone functions meaning the output from 'isel' will be empty as it will not be run.
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; UNSUPPORTED: target=nvptx{{.*}}, target=aarch64{{.*}}, target=arm64{{.*}}
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; This test verifies that we don't run Machine Function optimizations
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; on optnone functions, and that we can turn off FastISel.
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; Function Attrs: noinline optnone
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define i32 @_Z3fooi(i32 %x) #0 {
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entry:
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%x.addr = alloca i32, align 4
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store i32 %x, ptr %x.addr, align 4
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br label %while.cond
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while.cond: ; preds = %while.body, %entry
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%0 = load i32, ptr %x.addr, align 4
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%dec = add nsw i32 %0, -1
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store i32 %dec, ptr %x.addr, align 4
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%tobool = icmp ne i32 %0, 0
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br i1 %tobool, label %while.body, label %while.end
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while.body: ; preds = %while.cond
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br label %while.cond
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while.end: ; preds = %while.cond
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ret i32 0
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}
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attributes #0 = { optnone noinline }
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; Nothing that runs at -O0 gets skipped.
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; LLC-O0-NOT: Skipping pass
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; Machine Function passes run at -O1 and higher.
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; LLC-Ox-DAG: Skipping pass 'Branch Probability Basic Block Placement'
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; LLC-Ox-DAG: Skipping pass 'CodeGen Prepare'
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; LLC-Ox-DAG: Skipping pass 'Control Flow Optimizer'
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; LLC-Ox-DAG: Skipping pass 'Machine code sinking'
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; LLC-Ox-DAG: Skipping pass 'Machine Common Subexpression Elimination'
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; LLC-Ox-DAG: Skipping pass 'Shrink Wrapping analysis'
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; LLC-Ox-DAG: Skipping pass 'Machine Copy Propagation Pass'
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; LLC-Ox-DAG: Skipping pass 'Machine Instruction Scheduler'
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; LLC-Ox-DAG: Skipping pass 'Machine Loop Invariant Code Motion'
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; LLC-Ox-DAG: Skipping pass 'Optimize machine instruction PHIs'
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; LLC-Ox-DAG: Skipping pass 'Peephole Optimizations'
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; LLC-Ox-DAG: Skipping pass 'Post{{.*}}RA{{.*}}{{[Ss]}}cheduler'
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; LLC-Ox-DAG: Skipping pass 'Remove dead machine instructions'
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; LLC-Ox-DAG: Skipping pass 'Tail Duplication'
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; Alternate post-RA scheduler.
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; LLC-MORE: Skipping pass 'PostRA Machine Instruction Scheduler'
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; Selectively disable FastISel for optnone functions.
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; FAST: FastISel is enabled
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; NOFAST: FastISel is disabled
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