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36 lines
1.3 KiB
TableGen
36 lines
1.3 KiB
TableGen
// RUN: not llvm-tblgen -gen-disassembler -I %p/../../../include %s -o /dev/null 2>&1 \
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// RUN: | FileCheck --strict-whitespace %s
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include "llvm/Target/Target.td"
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class I : Instruction {
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let InOperandList = (ins i32imm:$op, i32imm:$op2, i32imm:$op3);
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let OutOperandList = (outs);
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}
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// Check pretty printing of decoding conflicts.
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// CHECK: {{^}}Decoding Conflict:
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// CHECK-NEXT: {{^}} ........
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// CHECK-NEXT: {{^}} ..............11
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// CHECK-NEXT: {{^}} .......0......11
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// CHECK-NEXT: {{^}} _______0______11 I16_0
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// CHECK-NEXT: {{^}} _______0______11 I16_1
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// CHECK-NEXT: {{^}} _______0_______0______11 I24_0
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def I8_0 : I { dag Inst = (descend (operand "$op", 6), 0b00); }
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def I8_1 : I { dag Inst = (descend (operand "$op", 6), 0b01); }
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def I16_0 : I { dag Inst = (descend (operand "$op2", 7), 0b0,
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(operand "$op", 6), 0b11); }
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def I16_1 : I { dag Inst = (descend (operand "$op2", 7), 0b0,
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(operand "$op", 6), 0b11); }
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def I24_0 : I { dag Inst = (descend (operand "$op3", 7), 0b0,
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(operand "$op2", 7), 0b0,
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(operand "$op", 6), 0b11); }
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def II : InstrInfo;
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def MyTarget : Target {
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let InstructionSet = II;
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}
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