derek.holloway
7502bf64a4
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56 lines
2.6 KiB
LLVM
56 lines
2.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -S -passes='require<domtree>,infer-address-spaces' %s | FileCheck %s
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define void @test(ptr %lhs_ptr, ptr %rhs_ptr) {
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; CHECK-LABEL: define void @test(
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; CHECK-SAME: ptr [[LHS_PTR:%.*]], ptr [[RHS_PTR:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[PTR_1:%.*]] = load ptr, ptr [[LHS_PTR]], align 8
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; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr [[PTR_1]] to ptr addrspace(3)
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; CHECK-NEXT: [[BOOL_1:%.*]] = tail call i1 @llvm.amdgcn.is.shared(ptr [[PTR_1]])
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[BOOL_1]])
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; CHECK-NEXT: [[PTR_2:%.*]] = load ptr, ptr [[RHS_PTR]], align 8
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; CHECK-NEXT: [[TMP1:%.*]] = addrspacecast ptr [[PTR_2]] to ptr addrspace(3)
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; CHECK-NEXT: [[BOOL_2:%.*]] = tail call i1 @llvm.amdgcn.is.shared(ptr [[PTR_2]])
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[BOOL_2]])
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; CHECK-NEXT: br i1 poison, label %[[IF_THEN:.*]], label %[[IF_ELSE:.*]]
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; CHECK: [[IF_THEN]]:
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; CHECK-NEXT: [[V1:%.*]] = load i32, ptr null, align 4
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; CHECK-NEXT: br label %[[IF_SINK_SPLIT:.*]]
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; CHECK: [[IF_ELSE]]:
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; CHECK-NEXT: [[V2:%.*]] = load i32, ptr null, align 4
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; CHECK-NEXT: br label %[[IF_SINK_SPLIT]]
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; CHECK: [[IF_SINK_SPLIT]]:
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; CHECK-NEXT: [[PTR_SINK:%.*]] = phi ptr addrspace(3) [ [[TMP0]], %[[IF_THEN]] ], [ [[TMP1]], %[[IF_ELSE]] ]
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; CHECK-NEXT: [[V_SINK:%.*]] = phi i32 [ [[V1]], %[[IF_THEN]] ], [ [[V2]], %[[IF_ELSE]] ]
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; CHECK-NEXT: store i32 [[V_SINK]], ptr addrspace(3) [[PTR_SINK]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%ptr.1 = load ptr, ptr %lhs_ptr, align 8
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%bool.1 = tail call i1 @llvm.amdgcn.is.shared(ptr %ptr.1)
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tail call void @llvm.assume(i1 %bool.1)
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%ptr.2 = load ptr, ptr %rhs_ptr, align 8
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%bool.2 = tail call i1 @llvm.amdgcn.is.shared(ptr %ptr.2)
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tail call void @llvm.assume(i1 %bool.2)
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br i1 poison, label %if.then, label %if.else
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if.then: ; preds = %entry
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%v1 = load i32, ptr null, align 4
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br label %if.sink.split
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if.else: ; preds = %entry
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%v2 = load i32, ptr null, align 4
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br label %if.sink.split
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if.sink.split: ; preds = %if.else, %if.then
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%ptr.sink = phi ptr [ %ptr.1, %if.then ], [ %ptr.2, %if.else ]
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%v.sink = phi i32 [ %v1, %if.then ], [ %v2, %if.else ]
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store i32 %v.sink, ptr %ptr.sink, align 4
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ret void
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}
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declare void @llvm.assume(i1 noundef)
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declare i1 @llvm.amdgcn.is.shared(ptr)
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