derek.holloway
7502bf64a4
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558 lines
57 KiB
ArmAsm
558 lines
57 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=andes-ax45mpv -iterations=1 -instruction-tables=full < %s | FileCheck %s
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vsetvli zero, zero, e8, mf8, ta, ma
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vle8.v v8, (a0)
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vsetvli zero, zero, e8, mf4, ta, ma
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vle8.v v8, (a0)
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vsetvli zero, zero, e8, mf2, ta, ma
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vle8.v v8, (a0)
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vsetvli zero, zero, e8, m1, ta, ma
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vle8.v v8, (a0)
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vsetvli zero, zero, e8, m2, ta, ma
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vle8.v v8, (a0)
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vsetvli zero, zero, e8, m4, ta, ma
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vle8.v v8, (a0)
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vsetvli zero, zero, e8, m8, ta, ma
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vle8.v v8, (a0)
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vsetvli zero, zero, e16, mf4, ta, ma
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vle16.v v8, (a0)
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vsetvli zero, zero, e16, mf2, ta, ma
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vle16.v v8, (a0)
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vsetvli zero, zero, e16, m1, ta, ma
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vle16.v v8, (a0)
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vsetvli zero, zero, e16, m2, ta, ma
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vle16.v v8, (a0)
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vsetvli zero, zero, e16, m4, ta, ma
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vle16.v v8, (a0)
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vsetvli zero, zero, e16, m8, ta, ma
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vle16.v v8, (a0)
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vsetvli zero, zero, e32, mf2, ta, ma
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vle32.v v8, (a0)
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vsetvli zero, zero, e32, m1, ta, ma
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vle32.v v8, (a0)
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vsetvli zero, zero, e32, m2, ta, ma
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vle32.v v8, (a0)
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vsetvli zero, zero, e32, m4, ta, ma
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vle32.v v8, (a0)
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vsetvli zero, zero, e32, m8, ta, ma
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vle32.v v8, (a0)
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vsetvli zero, zero, e64, m1, ta, ma
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vle64.v v8, (a0)
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vsetvli zero, zero, e64, m2, ta, ma
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vle64.v v8, (a0)
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vsetvli zero, zero, e64, m4, ta, ma
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vle64.v v8, (a0)
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vsetvli zero, zero, e64, m8, ta, ma
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vle64.v v8, (a0)
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vsetvli zero, zero, e8, mf8, ta, ma
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vse8.v v8, (a0)
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vsetvli zero, zero, e8, mf4, ta, ma
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vse8.v v8, (a0)
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vsetvli zero, zero, e8, mf2, ta, ma
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vse8.v v8, (a0)
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vsetvli zero, zero, e8, m1, ta, ma
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vse8.v v8, (a0)
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vsetvli zero, zero, e8, m2, ta, ma
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vse8.v v8, (a0)
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vsetvli zero, zero, e8, m4, ta, ma
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vse8.v v8, (a0)
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vsetvli zero, zero, e8, m8, ta, ma
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vse8.v v8, (a0)
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vsetvli zero, zero, e16, mf4, ta, ma
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vse16.v v8, (a0)
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vsetvli zero, zero, e16, mf2, ta, ma
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vse16.v v8, (a0)
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vsetvli zero, zero, e16, m1, ta, ma
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vse16.v v8, (a0)
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vsetvli zero, zero, e16, m2, ta, ma
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vse16.v v8, (a0)
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vsetvli zero, zero, e16, m4, ta, ma
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vse16.v v8, (a0)
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vsetvli zero, zero, e16, m8, ta, ma
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vse16.v v8, (a0)
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vsetvli zero, zero, e32, mf2, ta, ma
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vse32.v v8, (a0)
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vsetvli zero, zero, e32, m1, ta, ma
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vse32.v v8, (a0)
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vsetvli zero, zero, e32, m2, ta, ma
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vse32.v v8, (a0)
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vsetvli zero, zero, e32, m4, ta, ma
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vse32.v v8, (a0)
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vsetvli zero, zero, e32, m8, ta, ma
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vse32.v v8, (a0)
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vsetvli zero, zero, e64, m1, ta, ma
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vse64.v v8, (a0)
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vsetvli zero, zero, e64, m2, ta, ma
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vse64.v v8, (a0)
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vsetvli zero, zero, e64, m4, ta, ma
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vse64.v v8, (a0)
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vsetvli zero, zero, e64, m8, ta, ma
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vse64.v v8, (a0)
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# Unit-stride mask load/store
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vsetvli zero, zero, e8, mf8, ta, ma
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vlm.v v8, (a0)
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vsetvli zero, zero, e8, mf4, ta, ma
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vlm.v v8, (a0)
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vsetvli zero, zero, e8, mf2, ta, ma
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vlm.v v8, (a0)
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vsetvli zero, zero, e8, m1, ta, ma
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vlm.v v8, (a0)
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vsetvli zero, zero, e8, m2, ta, ma
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vlm.v v8, (a0)
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vsetvli zero, zero, e8, m4, ta, ma
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vlm.v v8, (a0)
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vsetvli zero, zero, e8, m8, ta, ma
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vlm.v v8, (a0)
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vsetvli zero, zero, e8, mf8, ta, ma
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vsm.v v8, (a0)
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vsetvli zero, zero, e8, mf4, ta, ma
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vsm.v v8, (a0)
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vsetvli zero, zero, e8, mf2, ta, ma
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vsm.v v8, (a0)
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vsetvli zero, zero, e8, m1, ta, ma
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vsm.v v8, (a0)
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vsetvli zero, zero, e8, m2, ta, ma
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vsm.v v8, (a0)
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vsetvli zero, zero, e8, m4, ta, ma
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vsm.v v8, (a0)
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vsetvli zero, zero, e8, m8, ta, ma
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vsm.v v8, (a0)
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# Fault-only-first
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vsetvli zero, zero, e8, mf8, ta, ma
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vle8ff.v v8, (a0)
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vsetvli zero, zero, e8, mf4, ta, ma
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vle8ff.v v8, (a0)
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vsetvli zero, zero, e8, mf2, ta, ma
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vle8ff.v v8, (a0)
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vsetvli zero, zero, e8, m1, ta, ma
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vle8ff.v v8, (a0)
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vsetvli zero, zero, e8, m2, ta, ma
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vle8ff.v v8, (a0)
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vsetvli zero, zero, e8, m4, ta, ma
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vle8ff.v v8, (a0)
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vsetvli zero, zero, e8, m8, ta, ma
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vle8ff.v v8, (a0)
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vsetvli zero, zero, e16, mf4, ta, ma
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vle16ff.v v8, (a0)
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vsetvli zero, zero, e16, mf2, ta, ma
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vle16ff.v v8, (a0)
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vsetvli zero, zero, e16, m1, ta, ma
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vle16ff.v v8, (a0)
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vsetvli zero, zero, e16, m2, ta, ma
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vle16ff.v v8, (a0)
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vsetvli zero, zero, e16, m4, ta, ma
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vle16ff.v v8, (a0)
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vsetvli zero, zero, e16, m8, ta, ma
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vle16ff.v v8, (a0)
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vsetvli zero, zero, e32, mf2, ta, ma
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vle32ff.v v8, (a0)
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vsetvli zero, zero, e32, m1, ta, ma
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vle32ff.v v8, (a0)
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vsetvli zero, zero, e32, m2, ta, ma
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vle32ff.v v8, (a0)
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vsetvli zero, zero, e32, m4, ta, ma
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vle32ff.v v8, (a0)
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vsetvli zero, zero, e32, m8, ta, ma
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vle32ff.v v8, (a0)
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vsetvli zero, zero, e64, m1, ta, ma
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vle64ff.v v8, (a0)
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vsetvli zero, zero, e64, m2, ta, ma
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vle64ff.v v8, (a0)
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vsetvli zero, zero, e64, m4, ta, ma
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vle64ff.v v8, (a0)
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vsetvli zero, zero, e64, m8, ta, ma
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vle64ff.v v8, (a0)
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# CHECK: Resources:
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# CHECK-NEXT: [0] - Andes45ALU:2
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# CHECK-NEXT: [1] - Andes45CSR:1
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# CHECK-NEXT: [2] - Andes45FDIV:1
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# CHECK-NEXT: [3] - Andes45FMAC:1
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# CHECK-NEXT: [4] - Andes45FMISC:1
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# CHECK-NEXT: [5] - Andes45FMV:1
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# CHECK-NEXT: [6] - Andes45LSU:1
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# CHECK-NEXT: [7] - Andes45MDU:1
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# CHECK-NEXT: [8] - Andes45VALU:1
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# CHECK-NEXT: [9] - Andes45VDIV:1
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# CHECK-NEXT: [10] - Andes45VFDIV:1
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# CHECK-NEXT: [11] - Andes45VFMIS:1
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# CHECK-NEXT: [12] - Andes45VLSU:1
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# CHECK-NEXT: [13] - Andes45VMAC:1
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# CHECK-NEXT: [14] - Andes45VMASK:1
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# CHECK-NEXT: [15] - Andes45VPERMUT:1
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK-NEXT: [7]: Bypass Latency
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# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
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# CHECK-NEXT: [9]: LLVM Opcode Name
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# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
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# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE8_V vle8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
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# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE8_V vle8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
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# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE8_V vle8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m1, ta, ma
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# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE8_V vle8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m2, ta, ma
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# CHECK-NEXT: 1 17 2.00 * 17 Andes45VLSU[2] VLE8_V vle8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m4, ta, ma
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# CHECK-NEXT: 1 17 4.00 * 17 Andes45VLSU[4] VLE8_V vle8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m8, ta, ma
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# CHECK-NEXT: 1 17 8.00 * 17 Andes45VLSU[8] VLE8_V vle8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
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# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE16_V vle16.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
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# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE16_V vle16.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, m1, ta, ma
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# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE16_V vle16.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, m2, ta, ma
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# CHECK-NEXT: 1 17 2.00 * 17 Andes45VLSU[2] VLE16_V vle16.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, m4, ta, ma
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# CHECK-NEXT: 1 17 4.00 * 17 Andes45VLSU[4] VLE16_V vle16.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, m8, ta, ma
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# CHECK-NEXT: 1 17 8.00 * 17 Andes45VLSU[8] VLE16_V vle16.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
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# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE32_V vle32.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, m1, ta, ma
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# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE32_V vle32.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, m2, ta, ma
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# CHECK-NEXT: 1 17 2.00 * 17 Andes45VLSU[2] VLE32_V vle32.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, m4, ta, ma
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# CHECK-NEXT: 1 17 4.00 * 17 Andes45VLSU[4] VLE32_V vle32.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, m8, ta, ma
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# CHECK-NEXT: 1 17 8.00 * 17 Andes45VLSU[8] VLE32_V vle32.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e64, m1, ta, ma
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# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE64_V vle64.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e64, m2, ta, ma
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# CHECK-NEXT: 1 17 2.00 * 17 Andes45VLSU[2] VLE64_V vle64.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e64, m4, ta, ma
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# CHECK-NEXT: 1 17 4.00 * 17 Andes45VLSU[4] VLE64_V vle64.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e64, m8, ta, ma
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# CHECK-NEXT: 1 17 8.00 * 17 Andes45VLSU[8] VLE64_V vle64.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
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# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSE8_V vse8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
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# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSE8_V vse8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
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# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSE8_V vse8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m1, ta, ma
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# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSE8_V vse8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m2, ta, ma
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# CHECK-NEXT: 1 1 2.00 * 1 Andes45VLSU[2] VSE8_V vse8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m4, ta, ma
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# CHECK-NEXT: 1 1 4.00 * 1 Andes45VLSU[4] VSE8_V vse8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m8, ta, ma
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# CHECK-NEXT: 1 1 8.00 * 1 Andes45VLSU[8] VSE8_V vse8.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
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# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSE16_V vse16.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
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# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSE16_V vse16.v v8, (a0)
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# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, m1, ta, ma
|
|
# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSE16_V vse16.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, m2, ta, ma
|
|
# CHECK-NEXT: 1 1 2.00 * 1 Andes45VLSU[2] VSE16_V vse16.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, m4, ta, ma
|
|
# CHECK-NEXT: 1 1 4.00 * 1 Andes45VLSU[4] VSE16_V vse16.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, m8, ta, ma
|
|
# CHECK-NEXT: 1 1 8.00 * 1 Andes45VLSU[8] VSE16_V vse16.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
|
|
# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSE32_V vse32.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, m1, ta, ma
|
|
# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSE32_V vse32.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, m2, ta, ma
|
|
# CHECK-NEXT: 1 1 2.00 * 1 Andes45VLSU[2] VSE32_V vse32.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, m4, ta, ma
|
|
# CHECK-NEXT: 1 1 4.00 * 1 Andes45VLSU[4] VSE32_V vse32.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, m8, ta, ma
|
|
# CHECK-NEXT: 1 1 8.00 * 1 Andes45VLSU[8] VSE32_V vse32.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e64, m1, ta, ma
|
|
# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSE64_V vse64.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e64, m2, ta, ma
|
|
# CHECK-NEXT: 1 1 2.00 * 1 Andes45VLSU[2] VSE64_V vse64.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e64, m4, ta, ma
|
|
# CHECK-NEXT: 1 1 4.00 * 1 Andes45VLSU[4] VSE64_V vse64.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e64, m8, ta, ma
|
|
# CHECK-NEXT: 1 1 8.00 * 1 Andes45VLSU[8] VSE64_V vse64.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLM_V vlm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLM_V vlm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLM_V vlm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m1, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLM_V vlm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m2, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLM_V vlm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m4, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLM_V vlm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m8, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLM_V vlm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
|
|
# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSM_V vsm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
|
|
# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSM_V vsm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
|
|
# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSM_V vsm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m1, ta, ma
|
|
# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSM_V vsm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m2, ta, ma
|
|
# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSM_V vsm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m4, ta, ma
|
|
# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSM_V vsm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m8, ta, ma
|
|
# CHECK-NEXT: 1 1 1.00 * 1 Andes45VLSU VSM_V vsm.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE8FF_V vle8ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE8FF_V vle8ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE8FF_V vle8ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m1, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE8FF_V vle8ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m2, ta, ma
|
|
# CHECK-NEXT: 1 17 2.00 * 17 Andes45VLSU[2] VLE8FF_V vle8ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m4, ta, ma
|
|
# CHECK-NEXT: 1 17 4.00 * 17 Andes45VLSU[4] VLE8FF_V vle8ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e8, m8, ta, ma
|
|
# CHECK-NEXT: 1 17 8.00 * 17 Andes45VLSU[8] VLE8FF_V vle8ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE16FF_V vle16ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE16FF_V vle16ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, m1, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE16FF_V vle16ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, m2, ta, ma
|
|
# CHECK-NEXT: 1 17 2.00 * 17 Andes45VLSU[2] VLE16FF_V vle16ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, m4, ta, ma
|
|
# CHECK-NEXT: 1 17 4.00 * 17 Andes45VLSU[4] VLE16FF_V vle16ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e16, m8, ta, ma
|
|
# CHECK-NEXT: 1 17 8.00 * 17 Andes45VLSU[8] VLE16FF_V vle16ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE32FF_V vle32ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, m1, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE32FF_V vle32ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, m2, ta, ma
|
|
# CHECK-NEXT: 1 17 2.00 * 17 Andes45VLSU[2] VLE32FF_V vle32ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, m4, ta, ma
|
|
# CHECK-NEXT: 1 17 4.00 * 17 Andes45VLSU[4] VLE32FF_V vle32ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e32, m8, ta, ma
|
|
# CHECK-NEXT: 1 17 8.00 * 17 Andes45VLSU[8] VLE32FF_V vle32ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e64, m1, ta, ma
|
|
# CHECK-NEXT: 1 17 1.00 * 17 Andes45VLSU VLE64FF_V vle64ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e64, m2, ta, ma
|
|
# CHECK-NEXT: 1 17 2.00 * 17 Andes45VLSU[2] VLE64FF_V vle64ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e64, m4, ta, ma
|
|
# CHECK-NEXT: 1 17 4.00 * 17 Andes45VLSU[4] VLE64FF_V vle64ff.v v8, (a0)
|
|
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli zero, zero, e64, m8, ta, ma
|
|
# CHECK-NEXT: 1 17 8.00 * 17 Andes45VLSU[8] VLE64FF_V vle64ff.v v8, (a0)
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0.0] - Andes45ALU
|
|
# CHECK-NEXT: [0.1] - Andes45ALU
|
|
# CHECK-NEXT: [1] - Andes45CSR
|
|
# CHECK-NEXT: [2] - Andes45FDIV
|
|
# CHECK-NEXT: [3] - Andes45FMAC
|
|
# CHECK-NEXT: [4] - Andes45FMISC
|
|
# CHECK-NEXT: [5] - Andes45FMV
|
|
# CHECK-NEXT: [6] - Andes45LSU
|
|
# CHECK-NEXT: [7] - Andes45MDU
|
|
# CHECK-NEXT: [8] - Andes45VALU
|
|
# CHECK-NEXT: [9] - Andes45VDIV
|
|
# CHECK-NEXT: [10] - Andes45VFDIV
|
|
# CHECK-NEXT: [11] - Andes45VFMIS
|
|
# CHECK-NEXT: [12] - Andes45VLSU
|
|
# CHECK-NEXT: [13] - Andes45VMAC
|
|
# CHECK-NEXT: [14] - Andes45VMASK
|
|
# CHECK-NEXT: [15] - Andes45VPERMUT
|
|
|
|
# CHECK: Resource pressure per iteration:
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
|
|
# CHECK-NEXT: - - 80.00 - - - - - - - - - - 212.00 - - -
|
|
|
|
# CHECK: Resource pressure by instruction:
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vle8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vle8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vle8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vle8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 2.00 - - - vle8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 4.00 - - - vle8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 8.00 - - - vle8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, mf4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vle16.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, mf2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vle16.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vle16.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, m2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 2.00 - - - vle16.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, m4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 4.00 - - - vle16.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, m8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 8.00 - - - vle16.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e32, mf2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vle32.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vle32.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e32, m2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 2.00 - - - vle32.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e32, m4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 4.00 - - - vle32.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e32, m8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 8.00 - - - vle32.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e64, m1, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vle64.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e64, m2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 2.00 - - - vle64.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e64, m4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 4.00 - - - vle64.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e64, m8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 8.00 - - - vle64.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vse8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vse8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vse8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vse8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 2.00 - - - vse8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 4.00 - - - vse8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 8.00 - - - vse8.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, mf4, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vse16.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, mf2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vse16.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, m1, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vse16.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, m2, ta, ma
|
|
# CHECK-NEXT: - - - - - - - - - - - - - 2.00 - - - vse16.v v8, (a0)
|
|
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, m4, ta, ma
|
|
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, m8, ta, ma
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e32, mf2, ta, ma
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e32, m1, ta, ma
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
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# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vle8ff.v v8, (a0)
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, m1, ta, ma
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, m2, ta, ma
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# CHECK-NEXT: - - - - - - - - - - - - - 2.00 - - - vle8ff.v v8, (a0)
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, m4, ta, ma
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# CHECK-NEXT: - - - - - - - - - - - - - 4.00 - - - vle8ff.v v8, (a0)
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e8, m8, ta, ma
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli zero, zero, e16, mf4, ta, ma
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# CHECK-NEXT: - - - - - - - - - - - - - 1.00 - - - vle16ff.v v8, (a0)
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