derek.holloway
7502bf64a4
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901 lines
88 KiB
ArmAsm
901 lines
88 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=tt-ascalon-x -instruction-tables=full -iterations=1 < %s | FileCheck %s
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vsetvli zero, zero, e8, mf8, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e8, mf4, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e8, mf2, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e8, m1, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e8, m1, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e8, m2, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e8, m4, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e8, m8, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e16, mf8, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e16, mf4, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e16, mf2, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e16, m1, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e16, m1, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e16, m2, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e16, m4, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e16, m8, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e32, mf8, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e32, mf4, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e32, mf2, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e32, m1, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e32, m1, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e32, m2, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e32, m4, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e32, m8, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e64, mf8, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e64, mf4, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e64, mf2, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e64, m1, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e64, m1, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e64, m2, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e64, m4, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e64, m8, tu, mu
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vmv1r.v v8, v16
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vsetvli zero, zero, e8, mf8, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e8, mf4, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e8, mf2, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e8, m1, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e8, m1, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e8, m2, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e8, m4, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e8, m8, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e16, mf8, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e16, mf4, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e16, mf2, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e16, m1, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e16, m1, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e16, m2, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e16, m4, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e16, m8, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e32, mf8, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e32, mf4, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e32, mf2, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e32, m1, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e32, m1, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e32, m2, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e32, m4, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e32, m8, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e64, mf8, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e64, mf4, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e64, mf2, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e64, m1, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e64, m1, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e64, m2, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e64, m4, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e64, m8, tu, mu
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vmv2r.v v8, v16
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vsetvli zero, zero, e8, mf8, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e8, mf4, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e8, mf2, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e8, m1, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e8, m1, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e8, m2, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e8, m4, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e8, m8, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e16, mf8, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e16, mf4, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e16, mf2, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e16, m1, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e16, m1, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e16, m2, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e16, m4, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e16, m8, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e32, mf8, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e32, mf4, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e32, mf2, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e32, m1, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e32, m1, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e32, m2, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e32, m4, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e32, m8, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e64, mf8, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e64, mf4, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e64, mf2, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e64, m1, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e64, m1, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e64, m2, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e64, m4, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e64, m8, tu, mu
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vmv4r.v v8, v16
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vsetvli zero, zero, e8, mf8, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e8, mf4, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e8, mf2, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e8, m1, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e8, m1, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e8, m2, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e8, m4, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e8, m8, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e16, mf8, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e16, mf4, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e16, mf2, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e16, m1, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e16, m1, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e16, m2, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e16, m4, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e16, m8, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e32, mf8, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e32, mf4, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e32, mf2, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e32, m1, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e32, m1, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e32, m2, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e32, m4, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e32, m8, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e64, mf8, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e64, mf4, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e64, mf2, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e64, m1, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e64, m1, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e64, m2, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e64, m4, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e64, m8, tu, mu
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vmv8r.v v8, v16
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vsetvli zero, zero, e64, m1, tu, mu
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vmv.s.x v8, x5
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vmv.x.s x7, v16
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vsetvli zero, zero, e64, m2, tu, mu
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vmv.s.x v8, x5
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vmv.x.s x7, v16
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vsetvli zero, zero, e64, m4, tu, mu
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vmv.s.x v8, x5
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vmv.x.s x7, v16
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vsetvli zero, zero, e64, m8, tu, mu
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vmv.s.x v8, x5
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vmv.x.s x7, v16
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vsetvli zero, zero, e64, m1, tu, mu
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vfmv.s.f v8, f5
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vfmv.f.s f7, v16
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vsetvli zero, zero, e64, m2, tu, mu
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vfmv.s.f v8, f5
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vfmv.f.s f7, v16
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vsetvli zero, zero, e64, m4, tu, mu
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vfmv.s.f v8, f5
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vfmv.f.s f7, v16
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vsetvli zero, zero, e64, m8, tu, mu
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vfmv.s.f v8, f5
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vfmv.f.s f7, v16
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# CHECK: Resources:
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# CHECK-NEXT: [0] - AscalonFP:2 AscalonFPA, AscalonFPB
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# CHECK-NEXT: [1] - AscalonFPA:1
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# CHECK-NEXT: [2] - AscalonFPB:1
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# CHECK-NEXT: [3] - AscalonFX:6 AscalonFXA, AscalonFXB, AscalonFXC, AscalonFXC, AscalonFXD, AscalonFXD
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# CHECK-NEXT: [4] - AscalonFXA:1
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# CHECK-NEXT: [5] - AscalonFXB:1
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# CHECK-NEXT: [6] - AscalonFXC:2
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# CHECK-NEXT: [7] - AscalonFXD:2
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# CHECK-NEXT: [8] - AscalonLS:3
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# CHECK-NEXT: [9] - AscalonV:2 AscalonVA, AscalonVB
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# CHECK-NEXT: [10] - AscalonVA:1
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# CHECK-NEXT: [11] - AscalonVB:1
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK-NEXT: [7]: Bypass Latency
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# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
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# CHECK-NEXT: [9]: LLVM Opcode Name
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# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
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# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
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# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
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# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m1, tu, mu
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# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, mf8, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, mf4, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, mf2, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 1 0.50 1 AscalonV VMV1R_V vmv1r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, mf8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, mf4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, mf2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonV[2] VMV2R_V vmv2r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf8, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf8, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf4, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, mf8, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, mf4, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, mf2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 4 2.00 4 AscalonV[4] VMV4R_V vmv4r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf8, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf8, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf4, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, mf8, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, mf4, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, mf2, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 8 4.00 8 AscalonV[8] VMV8R_V vmv8r.v v8, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VMV_S_X vmv.s.x v8, t0
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VMV_X_S vmv.x.s t2, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VMV_S_X vmv.s.x v8, t0
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VMV_X_S vmv.x.s t2, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VMV_S_X vmv.s.x v8, t0
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VMV_X_S vmv.x.s t2, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VMV_S_X vmv.s.x v8, t0
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VMV_X_S vmv.x.s t2, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VFMV_S_F vfmv.s.f v8, ft5
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VFMV_F_S vfmv.f.s ft7, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VFMV_S_F vfmv.s.f v8, ft5
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VFMV_F_S vfmv.f.s ft7, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VFMV_S_F vfmv.s.f v8, ft5
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VFMV_F_S vfmv.f.s ft7, v16
|
|
# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VFMV_S_F vfmv.s.f v8, ft5
|
|
# CHECK-NEXT: 1 2 1.00 2 AscalonFX,AscalonV[2] VFMV_F_S vfmv.f.s ft7, v16
|
|
|
|
# CHECK: Resources:
|
|
# CHECK-NEXT: [0] - AscalonFPA
|
|
# CHECK-NEXT: [1] - AscalonFPB
|
|
# CHECK-NEXT: [2] - AscalonFXA
|
|
# CHECK-NEXT: [3] - AscalonFXB
|
|
# CHECK-NEXT: [4.0] - AscalonFXC
|
|
# CHECK-NEXT: [4.1] - AscalonFXC
|
|
# CHECK-NEXT: [5.0] - AscalonFXD
|
|
# CHECK-NEXT: [5.1] - AscalonFXD
|
|
# CHECK-NEXT: [6.0] - AscalonLS
|
|
# CHECK-NEXT: [6.1] - AscalonLS
|
|
# CHECK-NEXT: [6.2] - AscalonLS
|
|
# CHECK-NEXT: [7] - AscalonVA
|
|
# CHECK-NEXT: [8] - AscalonVB
|
|
|
|
# CHECK: Resource pressure per iteration:
|
|
# CHECK-NEXT: [0] [1] [2] [3] [4.0] [4.1] [5.0] [5.1] [6.0] [6.1] [6.2] [7] [8]
|
|
# CHECK-NEXT: - - 2.67 2.67 2.67 2.67 2.67 2.67 - - - 324.00 324.00
|
|
|
|
# CHECK: Resource pressure by instruction:
|
|
# CHECK-NEXT: [0] [1] [2] [3] [4.0] [4.1] [5.0] [5.1] [6.0] [6.1] [6.2] [7] [8] Instructions:
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmv1r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m1, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf8, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf4, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf2, tu, mu
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
|
|
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# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmv2r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 2.00 2.00 vmv4r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e8, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e16, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, mf2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, mf8, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, mf4, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, mf2, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m1, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m2, tu, mu
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - - - - - - - - - - 4.00 4.00 vmv8r.v v8, v16
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m1, tu, mu
|
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vmv.s.x v8, t0
|
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vmv.x.s t2, v16
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m2, tu, mu
|
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vmv.s.x v8, t0
|
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vmv.x.s t2, v16
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m4, tu, mu
|
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vmv.s.x v8, t0
|
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vmv.x.s t2, v16
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m8, tu, mu
|
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vmv.s.x v8, t0
|
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vmv.x.s t2, v16
|
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m1, tu, mu
|
|
# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vfmv.s.f v8, ft5
|
|
# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vfmv.f.s ft7, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m2, tu, mu
|
|
# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vfmv.s.f v8, ft5
|
|
# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vfmv.f.s ft7, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m4, tu, mu
|
|
# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vfmv.s.f v8, ft5
|
|
# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vfmv.f.s ft7, v16
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e64, m8, tu, mu
|
|
# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vfmv.s.f v8, ft5
|
|
# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 1.00 1.00 vfmv.f.s ft7, v16
|