derek.holloway
7502bf64a4
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138 lines
9.5 KiB
ArmAsm
138 lines
9.5 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=riscv64 -mcpu=tt-ascalon-x -instruction-tables=full -iterations=1 < %s | FileCheck %s
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vsetvli zero, zero, e32, m1, ta, ma
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vsll.vv v1, v2, v5
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vsll.vx v1, v2, t0
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vsll.vi v1, v2, 7
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vsrl.vv v1, v2, v5
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vsrl.vx v1, v2, t0
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vsrl.vi v1, v2, 7
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vsra.vv v1, v2, v5
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vsra.vx v1, v2, t0
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vsra.vi v1, v2, 7
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vsetvli zero, zero, e32, mf4, ta, ma
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vsll.vv v1, v2, v5
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vsll.vx v1, v2, t0
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vsll.vi v1, v2, 7
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vsrl.vv v1, v2, v5
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vsrl.vx v1, v2, t0
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vsrl.vi v1, v2, 7
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vsra.vv v1, v2, v5
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vsra.vx v1, v2, t0
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vsra.vi v1, v2, 7
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vsetvli zero, zero, e32, m8, ta, ma
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vmul.vv v1, v2, v5
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vmul.vx v1, v2, t1
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vmadd.vv v1, v2, v5
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vmadd.vx v1, t1, v2
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# CHECK: Resources:
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# CHECK-NEXT: [0] - AscalonFP:2 AscalonFPA, AscalonFPB
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# CHECK-NEXT: [1] - AscalonFPA:1
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# CHECK-NEXT: [2] - AscalonFPB:1
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# CHECK-NEXT: [3] - AscalonFX:6 AscalonFXA, AscalonFXB, AscalonFXC, AscalonFXC, AscalonFXD, AscalonFXD
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# CHECK-NEXT: [4] - AscalonFXA:1
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# CHECK-NEXT: [5] - AscalonFXB:1
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# CHECK-NEXT: [6] - AscalonFXC:2
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# CHECK-NEXT: [7] - AscalonFXD:2
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# CHECK-NEXT: [8] - AscalonLS:3
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# CHECK-NEXT: [9] - AscalonV:2 AscalonVA, AscalonVB
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# CHECK-NEXT: [10] - AscalonVA:1
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# CHECK-NEXT: [11] - AscalonVB:1
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK-NEXT: [7]: Bypass Latency
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# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
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# CHECK-NEXT: [9]: LLVM Opcode Name
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# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m1, ta, ma
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSLL_VV vsll.vv v1, v2, v5
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSLL_VX vsll.vx v1, v2, t0
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSLL_VI vsll.vi v1, v2, 7
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRL_VV vsrl.vv v1, v2, v5
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRL_VX vsrl.vx v1, v2, t0
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRL_VI vsrl.vi v1, v2, 7
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRA_VV vsra.vv v1, v2, v5
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRA_VX vsra.vx v1, v2, t0
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRA_VI vsra.vi v1, v2, 7
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, mf4, ta, ma
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSLL_VV vsll.vv v1, v2, v5
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSLL_VX vsll.vx v1, v2, t0
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSLL_VI vsll.vi v1, v2, 7
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRL_VV vsrl.vv v1, v2, v5
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRL_VX vsrl.vx v1, v2, t0
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRL_VI vsrl.vi v1, v2, 7
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRA_VV vsra.vv v1, v2, v5
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRA_VX vsra.vx v1, v2, t0
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# CHECK-NEXT: 1 1 0.50 1 AscalonFX,AscalonV VSRA_VI vsra.vi v1, v2, 7
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# CHECK-NEXT: 1 1 0.50 U 0 AscalonV VSETVLI vsetvli zero, zero, e32, m8, ta, ma
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# CHECK-NEXT: 1 8 4.00 8 AscalonFX,AscalonV[8] VMUL_VV vmul.vv v1, v2, v5
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# CHECK-NEXT: 1 8 4.00 8 AscalonFX,AscalonV[8] VMUL_VX vmul.vx v1, v2, t1
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# CHECK-NEXT: 1 8 4.00 8 AscalonFX,AscalonV[8] VMADD_VV vmadd.vv v1, v2, v5
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# CHECK-NEXT: 1 8 4.00 8 AscalonFX,AscalonV[8] VMADD_VX vmadd.vx v1, t1, v2
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# CHECK: Resources:
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# CHECK-NEXT: [0] - AscalonFPA
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# CHECK-NEXT: [1] - AscalonFPB
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# CHECK-NEXT: [2] - AscalonFXA
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# CHECK-NEXT: [3] - AscalonFXB
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# CHECK-NEXT: [4.0] - AscalonFXC
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# CHECK-NEXT: [4.1] - AscalonFXC
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# CHECK-NEXT: [5.0] - AscalonFXD
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# CHECK-NEXT: [5.1] - AscalonFXD
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# CHECK-NEXT: [6.0] - AscalonLS
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# CHECK-NEXT: [6.1] - AscalonLS
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# CHECK-NEXT: [6.2] - AscalonLS
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# CHECK-NEXT: [7] - AscalonVA
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# CHECK-NEXT: [8] - AscalonVB
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# CHECK: Resource pressure per iteration:
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# CHECK-NEXT: [0] [1] [2] [3] [4.0] [4.1] [5.0] [5.1] [6.0] [6.1] [6.2] [7] [8]
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# CHECK-NEXT: - - 3.67 3.67 3.67 3.67 3.67 3.67 - - - 26.50 26.50
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0] [1] [2] [3] [4.0] [4.1] [5.0] [5.1] [6.0] [6.1] [6.2] [7] [8] Instructions:
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m1, ta, ma
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsll.vv v1, v2, v5
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsll.vx v1, v2, t0
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsll.vi v1, v2, 7
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsrl.vv v1, v2, v5
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsrl.vx v1, v2, t0
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsrl.vi v1, v2, 7
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsra.vv v1, v2, v5
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsra.vx v1, v2, t0
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsra.vi v1, v2, 7
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, mf4, ta, ma
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsll.vv v1, v2, v5
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsll.vx v1, v2, t0
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsll.vi v1, v2, 7
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsrl.vv v1, v2, v5
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsrl.vx v1, v2, t0
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsrl.vi v1, v2, 7
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsra.vv v1, v2, v5
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsra.vx v1, v2, t0
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 0.50 0.50 vsra.vi v1, v2, 7
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# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vsetvli zero, zero, e32, m8, ta, ma
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 4.00 4.00 vmul.vv v1, v2, v5
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 4.00 4.00 vmul.vx v1, v2, t1
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 4.00 4.00 vmadd.vv v1, v2, v5
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# CHECK-NEXT: - - 0.17 0.17 0.17 0.17 0.17 0.17 - - - 4.00 4.00 vmadd.vx v1, t1, v2
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