derek.holloway
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105 lines
1.4 KiB
ArmAsm
105 lines
1.4 KiB
ArmAsm
# Blackfin testcase for HW Loops and user->super transitions
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# mach: bfin
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# sim: --environment operating
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#include "test.h"
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.include "testutils.inc"
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.macro check_hwloop_regs lc:req, lt:req, lb:req
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R0 = LC0;
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CC = R0 == \lc;
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IF !CC JUMP fail;
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R0 = LT0;
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CC = R0 == \lt;
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IF !CC JUMP fail;
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R0 = LB0;
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CC = R0 == \lb;
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IF !CC JUMP fail;
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R0 = LC1;
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CC = R0 == \lc;
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IF !CC JUMP fail;
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R0 = LT1;
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CC = R0 == \lt;
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IF !CC JUMP fail;
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R0 = LB1;
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CC = R0 == \lb;
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IF !CC JUMP fail;
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.endm
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start
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imm32 P0, EVT3;
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loadsym R0, exception;
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[P0] = R0;
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imm32 P0, EVT2;
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loadsym R0, nmi;
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[P0] = R0;
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loadsym R0, usermode;
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RETI = R0;
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# Set the LC/LB/LT up with LSB set
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# - Hardware clears LT LSB, but LB remains until we lower
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imm32 R6, 0xaaaa5555
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R4 = R6;
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BITCLR (R4, 0);
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imm32 R7, 0xaa55aa55
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R5 = R7;
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BITCLR (R5, 0);
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LC0 = R6;
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LT0 = R6;
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LB0 = R7;
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LC1 = R6;
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LT1 = R6;
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LB1 = R7;
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# Sanity check
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check_hwloop_regs R6, R4, R7
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RTI;
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usermode:
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# Make sure LSB has been cleared in LB
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check_hwloop_regs R6, R4, R5
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# Clear LSB in all LC/LT/LB
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LC0 = R4;
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LT0 = R4;
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LB0 = R5;
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LC1 = R4;
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LT1 = R4;
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LB1 = R5;
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# Now move back up to supervisor
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EXCPT 4;
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exception:
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# Make sure LSB is set in LB
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check_hwloop_regs R4, R4, R7
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# Clear the LSB and move up another supervisor level
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LC0 = R4;
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LT0 = R4;
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LB0 = R5;
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LC1 = R4;
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LT1 = R4;
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LB1 = R5;
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RAISE 2;
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nmi:
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# Make sure LSB stayed clear
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check_hwloop_regs R4, R4, R5
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dbg_pass
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fail:
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dbg_fail
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