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205 lines
5.8 KiB
YAML
205 lines
5.8 KiB
YAML
# ########################################################################
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# Copyright (C) 2025 Advanced Micro Devices, Inc. All rights Reserved.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and associated documentation files (the "Software"), to deal
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# in the Software without restriction, including without limitation the rights
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# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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# copies of the Software, and to permit persons to whom the Software is
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# furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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# THE SOFTWARE.
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#
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# ########################################################################
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---
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include: rocsparse_common.yaml
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Definitions:
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- &alpha_beta_range_quick
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- { alpha: 1.1, beta: -1.5, alphai: 0.87, betai: -0.75 }
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- &alpha_beta_range_checkin
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- { alpha: 0.0, beta: -2.0, alphai: 0.0, betai: 0.65 }
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- &alpha_beta_range_nightly
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- { alpha: 0.5, beta: 0.7, alphai: -1.5, betai: 0.0 }
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- { alpha: 1.0, beta: 0.0, alphai: 1.0, betai: 1.0 }
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Tests:
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- name: v2_spmv_sell_bad_arg
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category: pre_checkin
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function: v2_spmv_sell_bad_arg
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indextype: *i32_i64
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precision: *single_double_precisions_complex_real
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- name: v2_spmv_sell
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category: quick
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function: v2_spmv_sell
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indextype: *i32
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precision: *single_double_precisions_complex_real
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M: [300]
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N: [300]
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sell_slice_size: [7]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_one]
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matrix: [rocsparse_matrix_zero]
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- name: v2_spmv_sell
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category: quick
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function: v2_spmv_sell
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indextype: *i32_i64
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precision: *single_double_precisions_complex_real
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M: [87, 243]
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N: [143, 257]
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sell_slice_size: [5]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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- name: v2_spmv_sell_file
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category: quick
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function: v2_spmv_sell
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indextype: *i32_i64
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precision: *double_only_precisions
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M: 1
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N: 1
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sell_slice_size: [2]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_one]
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matrix: [rocsparse_matrix_file_rocalution]
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filename: [qc2534,
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nos2]
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- name: v2_spmv_sell
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category: pre_checkin
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function: v2_spmv_sell
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indextype: *i32_i64
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precision: *single_double_precisions_complex_real
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M: [2000]
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N: [2000]
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sell_slice_size: [8]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_one]
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matrix: [rocsparse_matrix_random]
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- name: v2_spmv_sell_file
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category: pre_checkin
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function: v2_spmv_sell
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indextype: *i32_i64
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precision: *double_only_precisions_complex
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M: 1
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N: 1
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sell_slice_size: [12]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_file_rocalution]
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filename: [Chevron2,
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Chevron3,
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Chevron4,
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Chebyshev4,
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mplate]
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- name: v2_spmv_sell
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category: nightly
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function: v2_spmv_sell
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indextype: *i32_i64
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precision: *single_double_precisions_complex_real
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M: [5467]
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N: [6514]
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sell_slice_size: [9, 10, 11]
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alpha_beta: *alpha_beta_range_nightly
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transA: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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- name: v2_spmv_sell_file
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category: nightly
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function: v2_spmv_sell
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indextype: *i32_i64
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precision: *double_only_precisions
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M: 1
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N: 1
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sell_slice_size: [2, 5, 7]
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alpha_beta: *alpha_beta_range_nightly
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transA: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_one]
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matrix: [rocsparse_matrix_file_rocalution]
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rand_gen_min: 0.0
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rand_gen_max: 100.0
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convert_to_int: true
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filename: [mac_econ_fwd500,
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bmwcra_1,
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scircuit,
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amazon0312,
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sme3Dc,
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shipsec1,
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webbase-1M,
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Chebyshev4,
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ASIC_320k,
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bibd_22_8,
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rma10]
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# Coverage gap tests: transpose with large slice sizes (develop vs reduced_ci)
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- name: v2_spmv_sell_transpose
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category: pre_checkin
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function: v2_spmv_sell
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indextype: *i32
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precision: *single_double_precisions_complex_real
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M: [500]
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N: [500]
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sell_slice_size: [64, 256]
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alpha_beta: *alpha_beta_range_checkin
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transA: [rocsparse_operation_transpose, rocsparse_operation_conjugate_transpose]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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- name: v2_spmv_sell_graph_test
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category: pre_checkin
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function: v2_spmv_sell
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indextype: *i32_i64
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precision: *single_double_precisions_complex_real
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M: [2000]
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N: [2000]
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sell_slice_size: [6]
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alpha_beta: *alpha_beta_range_quick
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transA: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_random]
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graph_test: true
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call_stage_analysis: [false]
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- name: v2_spmv_sell_file
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category: nightly
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function: v2_spmv_sell
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indextype: *i32
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precision: *double_only_precisions
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M: 1
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N: 1
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sell_slice_size: [56, 89, 238, 756]
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alpha_beta: *alpha_beta_range_nightly
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transA: [rocsparse_operation_none]
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baseA: [rocsparse_index_base_zero]
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matrix: [rocsparse_matrix_file_rocalution]
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filename: [scircuit,
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amazon0312,
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webbase-1M,
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Chebyshev4]
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